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Patent # Description
2017/0330971 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
The present invention relates to a semiconductor structure and a method for forming the same. The method comprises steps of providing a substrate having a...
2017/0330970 SEMICONDUCTOR STRUCTURE INCLUDING A TRANSISTOR HAVING STRESS CREATING REGIONS AND METHOD FOR THE FORMATION THEREOF
A method includes providing a semiconductor structure including a substrate, a gate structure over the substrate and a sidewall spacer adjacent the gate...
2017/0330969 Fabrication Of Vertical Field Effect Transistor Structure With Strained Channels
A method of forming a vertical fin field effect transistor (vertical finFET) with a strained channel, including forming one or more vertical fins on a...
2017/0330968 SEMICONDUCTOR DEVICE
A field oxide film lies extending from the underpart of a gate electrode to a drain region. A plurality of projection parts projects from the side face of the...
2017/0330967 SEMICONDUCTOR COMPONENT AND MANUFACTURING METHOD THEREOF
A semiconductor component including: a semiconductor substrate; and a semiconductor device provided thereon, the device being a field-effect transistor that...
2017/0330966 PREVENTION OF SUBCHANNEL LEAKAGE CURRENT
An embodiment includes an apparatus comprising: a fin structure on a substrate, the fin structure including fin top and bottom portions, a channel including a...
2017/0330965 AIR-GAP TOP SPACER AND SELF-ALIGNED METAL GATE FOR VERTICAL FETS
A transistor includes a vertical channel fin directly on a bottom source/drain region. A gate stack is formed on sidewalls of the vertical channel fin. A top...
2017/0330964 Semiconductor Devices and Methods for Forming Semiconductor Devices
A semiconductor device includes an array of needle-shaped trenches extending into a semiconductor substrate. The semiconductor device further includes a gate...
2017/0330963 Source/Drain Junction Formation
A device includes a first channel region and a first gate structure formed over the first channel region. A first source/drain region is adjacent the first...
2017/0330962 POWER MOSFET HAVING PLANAR CHANNEL, VERTICAL CURRENT PATH, AND TOP DRAIN ELECTRODE
In one embodiment, a power MOSFET cell includes an N+ silicon substrate having a drain electrode. An N-type drift layer is grown over the substrate. An N-type...
2017/0330961 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME, POWER CONVERSION DEVICE, THREE-PHASE MOTOR SYSTEM,...
An object of the present invention is to provide high-performance highly-reliable power semiconductor device. The semiconductor device according to the present...
2017/0330960 FORMING NON-LINE-OF-SIGHT SOURCE DRAIN EXTENSION IN AN NMOS FINFET USING N-DOPED SELECTIVE EPITAXIAL GROWTH
A finFET device includes an n-doped source and/or drain extension that is disposed between a gate spacer of the finFET and a bulk semiconductor portion of the...
2017/0330959 Semiconductor Device and Manufacturing Method Thereof
A semiconductor device includes a substrate, at least one active semiconductor fin, at least one first dummy semiconductor fin, and at least one second dummy...
2017/0330958 METHOD OF FABRICATING A TRANSISTOR WITH NANO-LAYERS HAVING A VERTICAL CHANNEL
A process for fabricating a vertical transistor is provided, including steps of providing a substrate surmounted by a stack of first to third layers made of...
2017/0330957 Fabrication Of Vertical Field Effect Transistor Structure With Strained Channels
A method of forming a vertical fin field effect transistor (vertical finFET) with a strained channel, including forming one or more vertical fins on a...
2017/0330956 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a first region and a second region;...
2017/0330955 OPTIMIZING GATE PROFILE FOR PERFORMANCE AND GATE FILL
Systems and methods of optimizing a gate profile for performance and gate fill are disclosed. A semiconductor device having an optimized gate profile includes...
2017/0330954 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes an interfacial layer on a substrate and agate structure on the interfacial layer. Preferably, the gate structure includes a...
2017/0330953 DIFFERENTIAL SG/EG SPACER INTEGRATION WITH EQUIVALENT NFET/PFET SPACER WIDTHS & DUAL RAISED SOURCE DRAIN...
A method of forming matched PFET/NFET spacers with differential widths for SG and EG structures and a method of forming differential width nitride spacers for...
2017/0330952 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
A semiconductor device and a method of forming the same, the semiconductor device include a substrate, and a first gate structure and a second gate structure...
2017/0330951 AIR-GAP TOP SPACER AND SELF-ALIGNED METAL GATE FOR VERTICAL FETS
Methods for forming a transistor include forming a gate conductor in contact with a gate stack. The gate conductor has a top surface that meets a middle point...
2017/0330950 Metal Nitride Alloy Contact for Semiconductor
Systems and methods are provided that enable the production of semiconductor devices having a metal nitride layer in direct contact with a semiconductor layer...
2017/0330949 Reduced Size Split Gate Non-volatile Flash Memory Cell And Method Of Making Same
A reduced size non-volatile memory cell array is achieved by forming first trenches in an insulation layer in the row direction, filling the first trenches...
2017/0330948 METAL-OXIDE-SEMICONDUCTOR TRANSISTOR AND METHOD OF FORMING GATE LAYOUT
A method of forming a gate layout includes providing a gate layout design diagram comprising at least one gate pattern, disposing at least one insulating plug...
2017/0330947 METAL-OXIDE-SEMICONDUCTOR TRANSISTOR AND METHOD OF FORMING GATE LAYOUT
A metal-oxide semiconductor transistor includes a substrate, a gate insulating layer disposed on a surface of the substrate, and a metal gate disposed on the...
2017/0330946 Semiconductor Device Having a Trench Gate Electrode
A semiconductor device includes a semiconductor substrate comprising a main surface and a gate electrode in a trench between neighboring semiconductor mesas,...
2017/0330945 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
Provided are a semiconductor device, the semiconductor device comprise, a substrate which comprises a first surface and a second surface facing the first...
2017/0330944 NORMALLY-OFF HETROJUNCTION TRANSISTOR WITH HIGH THRESHOLD VOLTAGE
The invention relates to a normally-off high-electron-mobility field-effect transistor (1), comprising: a superposition of a first layer of semiconductor...
2017/0330943 Semiconductor Device Having a Cavity
A power semiconductor device includes a semiconductor substrate having a drift region, a gate electrode trench in the semiconductor substrate and a field...
2017/0330942 Method of Fabricating a Power Semiconductor Device
Disclosed is a power device, such as power MOSFET, and method for fabricating same. The device includes an upper trench situated over a lower trench, where the...
2017/0330941 Methods for Forming Semiconductor Devices, Semiconductor Devices and Power Semiconductor Devices
A method for forming a semiconductor device includes forming a first insulation layer on a semiconductor substrate and forming a structured etch stop layer....
2017/0330940 HIGH ELECTRON MOBILITY TRANSISTOR (HEMT)
HEMT having a drain field plate is provided. The drain field plate is formed in the area between the gate and drain of a HEMT. The drain field plate includes a...
2017/0330939 FinFETs Having Dielectric Punch-Through Stoppers
A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion...
2017/0330938 THIN-FILM TRANSISTOR ARRAY SUBSTRATE
a thin-film transistor according to an exemplary embodiment of the present invention comprises an active layer; an intermediate layer; a gate insulating film;...
2017/0330937 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate including a plurality of transistor devices formed thereon, at least an epitaxial structure formed in between the...
2017/0330936 Three-dimensional semiconductor wafer
A three-dimensional semiconductor wafer relates to a semiconductor wafer, including a raw semiconductor wafer, at least one connection layer, a conduction...
2017/0330935 ELECTRONIC DEVICE INCLUDING SIDE GATE AND TWO-DIMENSIONAL MATERIAL CHANNEL AND METHOD OF MANUFACTURING THE...
Provided are electronic devices and methods of manufacturing same. An electronic device includes an energy barrier forming layer on a substrate, an upper...
2017/0330934 DEVICES AND METHODS OF FORMING SELF-ALIGNED, UNIFORM NANO SHEET SPACERS
Devices and methods of fabricating integrated circuit devices for forming uniform nano sheet spacers self-aligned to the channel are provided. One method...
2017/0330933 AIR GAPS FORMED BY POROUS SILICON REMOVAL
Semiconductor structures formed using a substrate that has a porous semiconductor layer and a device layer on the porous semiconductor layer. One or more...
2017/0330932 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
To provide a semiconductor device having a structure capable of forming a superjunction with less thermal history, a semiconductor device is provided, the...
2017/0330931 METAL-INSULATOR-METAL (MIM) CAPACITOR WITH AN ELECTRODE SCHEME FOR IMPROVED MANUFACTURABILITY AND RELIABILITY
A method for manufacturing a metal-insulator-metal (MIM) capacitor with a top electrode that is free of sidewall damage is provided. A bottom electrode layer...
2017/0330930 Semiconductor Die with Back-Side Integrated Inductive Component
An integrated circuit (IC) that includes a circuit substrate having a front side surface and an opposite back side surface. Active circuitry is located on the...
2017/0330929 DISPLAY APPARATUS
A display apparatus and a method of manufacturing a display apparatus, the apparatus including a plurality of pixels on a substrate, wherein a first pixel of...
2017/0330928 DISPLAY DEVICE
A display device includes a plurality of pixels, wherein a first pixel of the plurality of pixels includes: a scan line extending in a first direction; a data...
2017/0330927 DISPLAY DEVICE
A display device includes: a plurality of pixels each including a driving thin film transistor and a storage capacitor, wherein each of the pixels further...
2017/0330926 DOUBLE-SIDE OLED DISPLAY
A double-side OLED display is disclosed. The double-side OLED display includes a base layer and an OLED layer disposed on the base layer. The OLED layer...
2017/0330925 DOUBLE-SIDE OLED DISPLAY AND MANUFACTURE METHOD THEREOF
The disclosure discloses a double-side organic light-emitting diode (OLED) display and a manufacture method thereof. The double-side OLED display includes a...
2017/0330924 THIN FILM TRANSISTOR INCLUDING A VERTICAL CHANNEL AND DISPLAY APPARATUS USING THE SAME
A thin film transistor includes a substrate and a gate electrode disposed over the substrate. The gate electrode includes a center part and a peripheral part...
2017/0330923 TRANSPARENT DISPLAY DEVICE AND METHOD OF MANUFACTURING A TRANSPARENT DISPLAY DEVICE
In a method of manufacturing a transparent display device, a substrate including a pixel region and a transmission region may be provided. A first electrode...
2017/0330922 PIXEL CIRCUIT AND DISPLAY DEVICE, AND A METHOD OF MANUFACTURING PIXEL CIRCUIT
The display device including a pixel circuit has a first line, a transistor, a light emitting element, and a second line. The transistor is located between the...
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