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Patent # Description
2017/0329757 SYSTEMS AND METHODS FOR ANNOTATING AND LINKING ELECTRONIC DOCUMENTS
Computer implemented systems and methods are disclosed for annotating and linking electronic documents. In accordance with some embodiments, annotations...
2017/0329756 ELECTRONIC DOCUMENT EDITING APPARATUS CAPABLE OF INSERTING MEMO INTO PARAGRAPH, AND OPERATING METHOD THEREOF
The present invention provides a method of operating an electronic document editing apparatus capable of inserting a memo into a paragraph, the method...
2017/0329755 METHOD AND APPARATUS AND COMPUTER DEVICE FOR AUTOMATIC SEMANTIC ANNOTATION FOR AN IMAGE
According to the embodiments of the present invention, there is provided a method for training an image semantics annotation apparatus, comprising: a....
2017/0329754 PRE-PROCESSING FOR IDENTIFYING NONSENSE PASSAGES IN DOCUMENTS BEING INGESTED INTO A CORPUS OF A NATURAL...
A mechanism is provided in a data processing system for identifying nonsense passages in documents being ingested into a corpus. A natural language processing...
2017/0329753 Post-Processing for Identifying Nonsense Passages in a Question Answering System
A mechanism is provided in a data processing system for identifying nonsense passages. The mechanism annotates an input passage with linguistic features to...
2017/0329752 CROSS-DEVICE DOCUMENT TRANSACTIONS
Systems and methods provide for optimizing transactions on digital documents between remote client devices. A digital document having one or more...
2017/0329751 CLIPBOARD AUGMENTATION WITH REFERENCES
Systems, methods, and data structures for augmenting data placed on the clipboard with additional data are disclosed. Where the data placed on the clipboard...
2017/0329750 INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM
An information processing apparatus including a first indication output unit. The first indication output unit outputs, in a case where a second user edits a...
2017/0329749 EXTRACTING INFORMATION FROM TABLES EMBEDDED WITHIN DOCUMENTS
Much valuable information in documents is presented within tables. However, the information within tables is hard to extract automatically with high accuracy...
2017/0329748 METHOD AND SYSTEM FOR EDITING HYPERLINK IN A THREE-DIMENSIONAL SCENE
The disclosure is related to a method and a system for editing hyperlink in a three-dimensional scene. The method is applicable to a smart device. An...
2017/0329747 SYSTEM AND METHOD FOR OPTIMIZING ELECTRONIC DOCUMENT LAYOUTS
A system and method is provided that ranks and sorts websites, apps, email, or VR environment content in real-time to increase engagement, CTR, conversions,...
2017/0329746 PAGE COMPONENT DYNAMIC LAYOUT
A page component dynamic layout method includes: initiating, by a client terminal, a page content request to a server based on a triggered request page;...
2017/0329745 TEXTUAL MESSAGE ORDERING BASED ON MESSAGE CONTENT
A technique for ordering textual messages in a graphical user interface (GUI) of a communication application based on text content can include receiving a...
2017/0329744 METHOD FOR PRODUCING MECHANICAL DEVICES COMPRISING SEVERAL ASSEMBLED IDENTICAL PARTS
The invention relates to a method for producing a plurality of mechanical devices, in which each mechanical device comprises a defined number N of identical...
2017/0329743 APPARATUS AND METHOD FOR CALCULATING RECEPTION TIME OF WIRELESS COMMUNICATION SIGNAL
An apparatus for calculating a reception time of a wireless communication signal is disclosed. The apparatus includes a downconverted signal generator...
2017/0329742 INTERACTIVE VEHICLE ENGINE CONTROL UNIT (ECU) REPROGRAMMING
Disclosed herein are techniques and structures to update vehicle controller programming in a vehicle. Such updating includes logically coupling at least one...
2017/0329741 Graphic Processor Unit with Improved Energy Efficiency
A GPU architecture employs a crossbar switch to preferentially store operand vectors in a compressed form allowing reduction in the number of memory circuits...
2017/0329740 DISTRIBUTED CLIENT BASED CACHE FOR KEYS USING DEMAND FAULT INVALIDATION
A method and system of storing and retrieving data in a computer system are disclosed. In an embodiment, the method comprises storing a data object at a...
2017/0329739 METHODS AND SYSTEMS FOR LOADING A BOOT AGENT ON A ROUTER NETWORK DEVICE
Systems and methods described herein may perform processing associated with loading, with a boot agent injection module in communication with a processor; a...
2017/0329738 DIGITAL SIGNALING SCHEMES FOR LINE MULTIPLEXED UART FLOW CONTROL
Systems, methods, and apparatus for line multiplexed serial interfaces are disclosed. A method performed by a transmitting device includes asserting a stop...
2017/0329737 TWO-WIRE LINE-MULTIPLEXED UART TO FOUR-WIRE HIGH-SPEED UART BRIDGING WITH INTEGRATED FLOW CONTROL
Systems, methods, and apparatus for bridging between different types of serial interface are disclosed. A method performed by a bridge circuit includes...
2017/0329736 FLEXIBLE NVME DRIVE MANAGEMENT SOLUTION
In some embodiments, a system for flexible non-volatile memory express drive management can include a first controller including a first drive register and a...
2017/0329735 HIGH AVAILABILITY OF PCIE DEVICES UNDER MULTIPLE PROCESSORS TO PROVIDE REDUNDANCY
A method is implemented by a network device to configure the operation of a Peripheral Component Interconnect Express (PCIe) switch to enable an efficient...
2017/0329734 Multifunctional Portable Data Card and Data Transmission Method
A multifunctional portable data card and a data transmission method are provided. The data card includes a main control module, a gear selection module, a data...
2017/0329733 MULTI-HOST SUPPORTED UNIVERSAL SERIAL BUS HUB AND AUTOMOBILE HEAD UNIT USING THE SAME
A universal serial bus (USB) hub supporting multiple hosts and an automobile head unit using the same are provided. A USB hub circuit is set in the USB hub,...
2017/0329732 METHOD FOR TEMPORALLY SYNCHRONIZING THE OUTPUT AND/OR TEMPORALLY SYNCHRONIZING THE PROCESSING OF SIGNALS
Method for temporally synchronizing the output of signals and/or temporally synchronizing the processing of captured signals on a plurality of input and/or...
2017/0329731 METHOD AND APPARATUS FOR EFFICIENT AND FLEXIBLE DIRECT MEMORY ACCESS
Method and system embodying the method for a direct memory access between a data storage and a data processing device via one or more direct memory access...
2017/0329730 METHOD AND UNIT FOR HANDLING INTERRUPTS IN A SYSTEM
The present disclosure presents method and unit for handling interrupts in a system. The method comprises receiving, by a receiving module of a Withdrawal...
2017/0329729 CALLBACK INTERRUPT HANDLING FOR MULTI-THREADED APPLICATIONS IN COMPUTING ENVIRONMENTS
A mechanism is described for facilitating callback interrupt handling for multi-threaded applications in computing environments. A method of embodiments, as...
2017/0329728 SYSTEM, METHOD AND COMPUTER-ACCESSIBLE MEDIUM FOR LOW-OVERHEAD SECURITY WRAPPER FOR MEMORY ACCESS CONTROL OF...
An exemplary system for wrapping an intellectual property core (IP) bus master(s), can include, for example, a plurality of IP cores associated with the IP...
2017/0329727 DYNAMIC BUS INVERSION WITH PROGRAMMABLE TERMINATION LEVEL TO MAINTAIN PROGRAMMABLE TARGET RATIO OF ONES AND...
Dynamic bus inversion (DBI) for programmable levels of a ratio of ones and zeros. A transmitting device identifies a number and/or ratio of ones and zeros in a...
2017/0329726 MEMORY SYSTEM AND OPERATION METHOD OF THE SAME
A memory system includes: a plurality of memory devices, one of which includes an unrepaired defective memory cell; a control bus that is shared by the...
2017/0329725 SYSTEM, TARGET APPARATUS, TERMINAL, PROGRAM, AND METHOD
A system includes: a terminal that is capable of executing a plurality of programs; and a target apparatus that is capable of communicating with the terminal....
2017/0329724 MEMORY SYSTEM, STORAGE DEVICE, AND METHOD FOR CONTROLLING MEMORY SYSTEM
To suppress the degradation of memory cells in a non-volatile memory. A read processing unit performs a read process for reading read data from each of a...
2017/0329723 Protection Scheme for Embedded Code
A code protection scheme for controlling access to a memory region in an integrated circuit includes a processor with an instruction pipeline that includes...
2017/0329722 IMPORTANCE BASED PAGE REPLACEMENT
Memory management is provided which includes a page replacement process managed by a storage manager and a workload manager. The page replacement process swaps...
2017/0329721 INFORMATION PROCESSING DEVICE, METHOD OF CONTROLLING A CACHE MEMORY, AND STORAGE MEDIUM
A device includes: a cache memory configured to store a first list and a second list, and a processor. The first list includes one or more entries that include...
2017/0329720 DETERMINISTIC MULTIFACTOR CACHE REPLACEMENT
Some embodiments modify caching server operation to evict cached content based on a deterministic and multifactor modeling of the cached content. The modeling...
2017/0329719 Memory Controller For Selective Rank Or Subrank Access
A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and...
2017/0329718 VIRTUAL MEMORY PAGE MAPPING OVERLAYS
In some embodiments, a memory overlay system comprises a translation lookaside buffer (TLB) that includes an entry that specifies a virtual address range that...
2017/0329717 FAULT BUFFER FOR RESOLVING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM
A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual...
2017/0329716 MAPPED REGION TABLE
Techniques and systems for first determining if a non-volatile memory configured to store physical data pages is being initialized, and a volatile memory...
2017/0329715 HAZARD AVOIDANCE IN A MULTI-SLICE PROCESSOR
Hazard avoidance in a multi-slice processor including adding, to a hazard table, an entry for an effective address, wherein the entry comprises an instruction...
2017/0329714 Fibre Channel Scale-Out With Physical Path Discovery and Volume Move
Methods, storage arrays and computer readable media for path discovery to ports of a Fibre Channel storage system that includes a multi-array pool and is part...
2017/0329713 OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A LOAD/STORE UNIT MAINTAINING REJECTED INSTRUCTIONS
Operation of a multi-slice processor that includes a plurality of execution slices, a plurality of load/store slices, and one or more instruction sequencing...
2017/0329712 METHOD OF PARTITIONING A SET-ASSOCIATIVE CACHE IN A COMPUTING PLATFORM
A method of partitioning a set-associative cache for a plurality of software components may comprise identifying a cache height equal to a number of sets in...
2017/0329711 INTERLEAVED CACHE CONTROLLERS WITH SHARED METADATA AND RELATED DEVICES AND SYSTEMS
Interleaved cache controllers with shared metadata are disclosed and described. A memory system may comprise a plurality of cache controllers and a metadata...
2017/0329710 LOGICAL MEMORY BUFFERS FOR A MEDIA CONTROLLER
In some examples, a media controller includes a buffer and controller circuitry. The controller circuitry may receive, from a memory device linked to the media...
2017/0329709 MEMORY SYSTEM HAVING MULTIPLE CACHE PAGES AND OPERATING METHOD THEREOF
A semiconductor memory system and an operating method thereof include a controller; and a memory device including a memory page manager, Nand pages, and...
2017/0329708 PERFORMING EFFICIENT CACHE INVALIDATION
Performing efficient cache invalidation is disclosed, including: receiving an invalidation request to invalidate one or more invalidated cache entries at a...
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