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Patent # Description
2017/0358624 DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF
A display apparatus including a light emitting diode part including a plurality of regularly arranged light emitting diodes, and a TFT panel part configured to...
2017/0358623 MASKLESS PARALLEL PICK-AND-PLACE TRANSFER OF MICRO-DEVICES
A method of surface mounting micro-devices includes adhering a first plurality of micro-devices on a donor substrate to a transfer surface with an adhesive...
2017/0358622 METHOD OF MANUFACTURING SOLID-STATE IMAGE SENSOR
A method of manufacturing a solid-state image sensor is provided. A first insulating member and an electrically conductive member is formed above a ...
2017/0358621 PHOTOSENSITIVE IMAGING DEVICES AND ASSOCIATED METHODS
A monolithic sensor for detecting infrared and visible light according to an example includes a semiconductor substrate and a semiconductor layer coupled to...
2017/0358620 COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) IMAGE SENSOR
A complementary metal-oxide-semiconductor (CMOS) image sensor having a passivation layer is provided. The CMOS image sensor includes a sensing device...
2017/0358619 PHOTODETECTOR AND METHOD OF FORMING THE PHOTODETECTOR ON STACKED TRENCH ISOLATION REGIONS
Disclosed are structures and methods of forming the structures so as to have a photodetector isolated from a substrate by stacked trench isolation regions. In...
2017/0358618 SOLID STATE IMAGE PICKUP ELEMENT AND METHOD OF MANUFACTURING SOLID STATE IMAGE PICKUP ELEMENT
Provided is a solid state image pickup element including a MOS type transistor which amplifies a signal which is based on electric charges generated in a...
2017/0358617 APPARATUS AND METHODS FOR BURIED CHANNEL TRANSFER GATE
An image sensor pixel may include a photodiode, a floating diffusion, and a transfer gate. A buried channel may be formed under the transfer gate. The buried...
2017/0358616 ACTIVE PIXEL IMAGE SENSOR BASED ON CMOS TECHNOLOGY WITH ELECTRON MULTIPLICATION
In an active pixel image sensor using CMOS technology formed within a substrate of a first type of conductivity P, each pixel comprises a photosensitive...
2017/0358615 IMAGE SENSOR AND IMAGING APPARATUS INCLUDING THE SAME
Provided are an image sensor and an imaging apparatus. The image sensor of a multi-layered sensor structure, the image sensor includes a plurality of sensing...
2017/0358614 SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS
The present technology relates to a solid-state imaging device that can achieve a higher resolution while increasing sensitivity, and an electronic apparatus....
2017/0358613 SEMICONDUCTOR CRYSTAL SUBSTRATE, INFRARED DETECTOR, METHOD FOR PRODUCING SEMICONDUCTOR CRYSTAL SUBSTRATE, AND...
A semiconductor crystal substrate includes a crystal substrate that is formed of a material including one of GaSb and InAs, a first buffer layer that is formed...
2017/0358612 HOLLOWED ELECTRONIC DISPLAY
Presented here are manufacturing techniques to create an irregularly shaped electronic display, including a hollow within which a sensor, such as a camera, can...
2017/0358611 HOLLOWED ELECTRONIC DISPLAY
Presented here are manufacturing techniques to create an irregularly shaped electronic display, including a hollow within which a sensor, such as a camera, can...
2017/0358610 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE
According to one embodiment, a semiconductor device includes a first insulating film, a first semiconductor layer formed of polycrystalline silicon, a second...
2017/0358609 SEMICONDUCTOR DEVICE
A semiconductor device is described, which includes a first transistor, a second transistor, and a capacitor. The second transistor and the capacitor are...
2017/0358608 CREATION OF WIDE BAND GAP MATERIAL FOR INTEGRATION TO SOI THEREOF
Devices and methods for forming a device are presented. The method for forming the device includes providing a support substrate having first crystal...
2017/0358607 METHODS FOR FORMING HYBRID VERTICAL TRANSISTORS
A method for forming a hybrid semiconductor device includes growing a stack of layers on a semiconductor substrate. The stack of layers includes a bottom layer...
2017/0358606 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a...
2017/0358605 DISPLAY DEVICE
A display device includes a driving gate electrode, a scan line separate from the driving gate electrode, a data line, a driving voltage line, and a...
2017/0358604 DISPLAY APPARATUS
A display apparatus includes an array substrate, a light emitting element, and a light shielding layer. The light emitting element is disposed on the array...
2017/0358603 DISPLAY APPARATUS
A display apparatus includes at least one pixel in a display area, a driving circuit disposed in a peripheral area adjacent the display area, the peripheral...
2017/0358602 DISPLAY PANEL INCLUDING EXTERNAL CONDUCTIVE PAD, DISPLAY APPARATUS INCLUDING THE SAME AND METHOD OF...
A display apparatus includes a first base substrate defining: an outer edge thereof at which a side surface is exposed, and an upper surface thereof connected...
2017/0358601 Display Substrate, Manufacturing Method Thereof and Display Device
A display substrate, a manufacturing method thereof and a display device are provided, and the display substrate includes pixel units, each of the pixel units...
2017/0358600 Semiconductor Chip and Method for Manufacturing the Same
Gate structures are positioned within a region in accordance with a gate horizontal grid that includes at least seven gate gridlines separated from each other...
2017/0358599 APPARATUSES HAVING A FERROELECTRIC FIELD-EFFECT TRANSISTOR MEMORY ARRAY AND RELATED METHOD
An apparatus comprises field-effect transistor (FET) structures stacked horizontally and vertically in a three-dimensional memory array architecture, gates...
2017/0358598 Memory Cells Comprising A Programmable Field Effect Transistor Having A Reversibly Programmable Gate Insulator
A memory cell comprises an elevationally extending programmable field effect transistor comprising a gate insulator that is reversibly programmable into two...
2017/0358597 SEMICONDUCTOR DEVICE
A semiconductor device includes gate electrodes and interlayer insulating layers alternately stacked on a substrate, a channel layer penetrating through the...
2017/0358596 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
A semiconductor device is provided as follows. A tunnel insulation layer is disposed on a substrate. The tunnel insulation layer includes a first silicon oxide...
2017/0358595 VERTICAL MEMORY BLOCKS AND RELATED DEVICES AND METHODS
Vertical memory blocks for semiconductor devices include a memory cell region including an array of memory cell pillars and at least one via region including a...
2017/0358594 METHOD OF FORMING A STAIRCASE IN A SEMICONDUCTOR DEVICE USING A LINEAR ALIGNMNENT CONTROL FEATURE
A linear mark extending perpendicular to a primary step direction of stepped terrace for a three-dimensional memory device can be employed as a reference...
2017/0358593 WITHIN-ARRAY THROUGH-MEMORY-LEVEL VIA STRUCTURES AND METHOD OF MAKING THEREOF
A semiconductor structure includes a memory-level assembly located over a substrate and including at least one alternating stack and memory stack structures...
2017/0358592 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Resistance of a FINFET is reduced while performance of an element is prevented from being deteriorated due to an increase in stress, thereby performance of a...
2017/0358591 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE RELATING TO RESISTANCE CHARACTERISTICS AND METHOD OF MANUFACTURING THE SAME
A semiconductor integrated circuit device may include a structure, a first capping layer, a channel layer and a second capping layer. The structure may have an...
2017/0358590 INTEGRATED CIRCUIT DEVICE INCLUDING VERTICAL MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
In one embodiment, the semiconductor device includes a stack of alternating interlayer insulating layers and conductive layers on a substrate. Each of the...
2017/0358589 MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
A manufacturing method of a semiconductor memory device is provided. The semiconductor memory device can suppress current leakage generated during a...
2017/0358588 MULTI TIME PROGRAMMABLE MEMORIES USING LOCAL IMPLANTATION IN HIGH-K/ METAL GATE TECHNOLOGIES
A metal oxide semiconductor field effect transistors (MOSFET) memory array, including a complementary metal oxide semiconductor (CMOS) cell including an n-type...
2017/0358587 MULTI TIME PROGRAMMABLE MEMORIES USING LOCAL IMPLANTATION IN HIGH-K/ METAL GATE TECHNOLOGIES
A metal oxide semiconductor field effect transistors (MOSFET) memory array, including a complementary metal oxide semiconductor (CMOS) cell including an n-type...
2017/0358586 SEMICONDUCTOR DEVICE WITH STACKED LAYOUT
The disclosed technology generally relates to semiconductor devices, and more particularly to semiconductor devices having a stacked arrangement, and further...
2017/0358585 METHOD, APPARATUS AND SYSTEM FOR FABRICATING SELF-ALIGNED CONTACT USING BLOCK-TYPE HARD MASK
At least one method, apparatus and system disclosed herein involves processing a semiconductor wafer using block mask design for manufacturing a finFET device....
2017/0358584 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
A method of fabricating a semiconductor device. The method includes forming a dummy structure over a substrate, forming conductive features on opposite sides...
2017/0358583 MEMORY DEVICE AND FABRICATING METHOD THEREOF
A memory device and a method for fabricating the same are provided. The memory device includes a substrate, a first active region, a second active region, a...
2017/0358582 Semiconductor Memory Device and Semiconductor Memory Array Comprising The Same
A semiconductor array, the semiconductor memory array includes bit lines, word lines and memory cells. The bit lines are arranged in parallel in a first...
2017/0358581 NON-VOLATILE MEMORY DEVICE EMPLOYING A DEEP TRENCH CAPACITOR
A non-volatile memory device with a programmable leakage can be formed employing a trench capacitor. After formation of a deep trench, a metal-insulator-metal...
2017/0358580 THREE-DIMENSIONAL DEVICES HAVING REDUCED CONTACT LENGTH
Various embodiments comprise apparatuses and methods including a memory array having alternating levels of semiconductor materials and dielectric material with...
2017/0358579 HIGH-K GATE DIELECTRIC AND METAL GATE CONDUCTOR STACK FOR FIN-TYPE FIELD EFFECT TRANSISTORS FORMED ON TYPE...
An electrical device that includes at least one n-type field effect transistor including a channel region in a type III-V semiconductor device, and at least...
2017/0358578 FIN-FET DEVICES AND FABRICATION METHODS THEREOF
A method for fabricating a Fin-FET includes forming a plurality of fin structures, an isolation layer, and an interlayer dielectric layer on an NMOS region of...
2017/0358577 FIELD-EFFECT-TRANSISTORS AND FABRICATION METHODS THEREOF
A method for fabrication a field-effect-transistor includes forming a plurality of fin structures on a substrate, forming a gate structure across each fin...
2017/0358576 SELF-ALIGNED SHALLOW TRENCH ISOLATION AND DOPING FOR VERTICAL FIN TRANSISTORS
A method of forming a vertical fin field effect transistor (vertical finFET) with a self-aligned shallow trench isolation region, including forming a pinch-off...
2017/0358575 FORMING INSULATOR FIN STRUCTURE IN ISOLATION REGION TO SUPPORT GATE STRUCTURES
A method for forming the semiconductor device that includes forming a plurality of composite fin structures across a semiconductor substrate including an...
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