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Patent # Description
2017/0365525 METHOD AND STRUCTURE TO ENABLE DUAL CHANNEL FIN CRITICAL DIMENSION CONTROL
A method for manufacturing a semiconductor device includes forming a first semiconductor layer on a substrate having a {100} crystallographic surface...
2017/0365524 Nano Wire Structure and Method for Fabricating the Same
A method includes depositing a sacrificial layer on a first dielectric layer over a substrate; applying a first patterning process, a second patterning...
2017/0365523 SEMICONDUCTOR DEVICE
A semiconductor device includes a fin region with long and short sides, a first field insulating layer including a top surface lower than that of the fin...
2017/0365522 INTEGRATED CIRCUIT DEVICE AND METHOD OF FABRICATING THE SAME
An integrated circuit device includes: a first fin-type active region in a first area of a substrate, the first fin-type active region having a first recess...
2017/0365521 SOURCE AND DRAIN EPITAXIAL SEMICONDUCTOR MATERIAL INTEGRATION FOR HIGH VOLTAGE SEMICONDUCTOR DEVICES
A method of forming a semiconductor device that includes providing a first set of fin structures having a first pitch, and a second set of fin structure having...
2017/0365520 Method for Producing an Integrated Heterojunction Semiconductor Device
A method of producing a semiconductor component is provided. The method includes providing a silicon substrate having a <111>-surface defining a vertical...
2017/0365519 METHOD OF PROCESSING A WAFER AND WAFER PROCESSING SYSTEM
A wafer has a device area on one side with a plurality of devices partitioned by a plurality of division lines. Either side of the wafer is attached to an...
2017/0365518 SEMICONDUCTOR PACKAGES WITH SUB-TERMINALS AND RELATED METHODS
A semiconductor device package includes a substrate having first and second opposing surfaces. A first surface of a die couples to the second surface of the...
2017/0365517 Semiconductor Device and Method of Forming Conductive Vias by Direct Via Reveal with Organic Passivation
A semiconductor device has a semiconductor wafer and a conductive via formed partially through the semiconductor wafer. A portion of the semiconductor wafer...
2017/0365516 Methods for Forming a Semiconductor Device and Semiconductor Devices
A method for forming a semiconductor device includes forming a plurality of non-semiconductor material portions at a first side of a semiconductor substrate;...
2017/0365515 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
The present disclosure relates to a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a...
2017/0365514 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor structure, a dielectric layer, a...
2017/0365513 TUNGSTEN FEATURE FILL WITH NUCLEATION INHIBITION
Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some...
2017/0365512 HYDROGENATION AND NITRIDIZATION PROCESSES FOR REDUCING OXYGEN CONTENT IN A FILM
Embodiments described herein generally relate to a sequential hydrogenation and nitridization process for reducing interfacial and bulk O atoms in a conductive...
2017/0365511 ARTICLES INCLUDING ULTRA LOW DIELECTRIC LAYERS
An article may include a structure including a patterned metal on a surface of a substrate, the patterned metal including metal features separated by gaps of...
2017/0365510 METHOD OF FORMING OPENING PATTERN
A method of forming an opening pattern including the following steps is provided. An ultra low dielectric constant layer, a dielectric hard mask layer and a...
2017/0365509 DEVICES AND METHODS OF FORMING ASYMMETRIC LINE/SPACE WITH BARRIERLESS METALLIZATION
Devices and methods of fabricating integrated circuit devices for forming assymetric line/space with barrierless metallization are provided. One method...
2017/0365508 Via Patterning Using Multiple Photo Multiple Etch
A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a...
2017/0365507 Field Emission Devices and Methods of Making Thereof
In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a...
2017/0365506 METHOD OF MANUFACTURING HIGH RESISTIVITY SOI WAFERS WITH CHARGE TRAPPING LAYERS BASED ON TERMINATED SI DEPOSITION
A method of preparing a single crystal semiconductor handle wafer in the manufacture of a silicon-on-insulator device is provided. The method comprises forming...
2017/0365505 FILLING PROCESSES
A method of filling cavities in a semiconductor structure during fabrication. A layer of a first material, e.g., a polysilazane, is deposited on the...
2017/0365504 FORMING AIR GAP
A method of forming an air gap for a semiconductor device and the device formed are disclosed. The method may include forming conductive interconnects in an...
2017/0365503 INTEGRATED CIRCUIT FOR A STABLE ELECTRICAL CONNECTION AND MANUFACTURING METHOD THEREOF
An integrated circuit includes a substrate, a pad electrode disposed on the substrate, and a passivation layer disposed on the pad electrode and including an...
2017/0365502 SEMICONDUCTOR DEVICE POSITIONING SYSTEM AND METHOD FOR SEMICONDUCTOR DEVICE POSITIONING
A positioning system and method for positioning a semiconductor device are disclosed. In an embodiment, a positioning system for positioning a semiconductor...
2017/0365501 APPARATUS AND METHOD FOR AUTOMATICALLY SETTING, CALIBRATING AND MONITORING OR MEASURING PICKUP HEAD POSITION...
A system is disclosed for calibrating the compressive forces exerted on a component during a component retrieval process from a carrier or support surface by a...
2017/0365500 ADHESIVE SHEET FOR LASER DICING AND METHOD FOR MANUFACTURING SEMICONDUCTOR
An adhesive sheet for laser dicing is provided that is capable of, in laser dicing by irradiation with laser light through the adhesive sheet, suppressing...
2017/0365499 Setting Up Ultra-Small or Ultra-Thin Discrete Components for Easy Assembly
Among other things a method including releasing a discrete component from an interim handle and depositing a discrete component on a handle substrate,...
2017/0365498 Tri-Modal Carrier for a Semiconductive Wafer
A tri-modal carrier provides a structural platform to temporarily bond a semiconductive wafer and can be used to transport the semiconductive wafer or be used...
2017/0365497 METHOD AND SYSTEM FOR POSITIONING USING NEAR FIELD TRANSDUCERS, PARTICULARLY SUITED FOR POSITIONING ELECTRONIC...
Method for positioning and orienting a first object relative to a second object. Method includes positioning a near field transducer having an aperture on the...
2017/0365496 WAFER CONTAINER WIHT SHOCK CONDITION PROTECTION
A front opening wafer container has a container portion and a door sized to close an open front of the container portion. The container portion has shelves for...
2017/0365495 Encapsulated Instrumented Substrate Apparatus for Acquiring Measurement Parameters in High Temperature Process...
An apparatus includes an instrumented substrate apparatus, a substrate assembly including a bottom and top substrate mechanically coupled, an electronic...
2017/0365494 System and Method for Decapsulation of Plastic Integrated Circuit Packages
System and method for decapsulation of plastic integrated circuit packages by providing a microwave generator, providing a Beenakker resonant cavity connected...
2017/0365493 HEATING DEVICE AND HEATING CHAMBER
A heating device and a heating chamber are provided, comprising a base plate (21), at least three supporting columns (22) and a heating assembly, where the at...
2017/0365492 WAFER PROCESSOR DOOR INTERFACE
A processing system includes at least one processor having a tank for holding a process liquid. A clean assembly above the tank is provided with an upper...
2017/0365491 Continuous Substrate Processing System
A processing chamber having a plurality of movable substrate carriers stacked therein for continuously processing a plurality of substrates is provided. The...
2017/0365490 METHODS FOR POLYMER COEFFICIENT OF THERMAL EXPANSION (CTE) TUNING BY MICROWAVE CURING
Methods of curing polyimide to tune the coefficient of thermal expansion are provided herein. In some embodiments, a method of curing a polymer layer on a...
2017/0365489 SYSTEM AND METHOD FOR MANUFACTURING A CAVITY DOWN FABRICATED CARRIER
A method of fabricating a receptacle down BGA carrier having a top surface and a bottom surface, the method comprising combining a conductive portion and a...
2017/0365488 Method for Forming Semiconductor Device Structure with Fine Line Pitch and Fine End-To-End Space
A method for forming a semiconductor device structure is provided. The method includes providing a substrate and forming a bottom layer, a middle layer, and a...
2017/0365487 CHEMISTRIES FOR ETCHING MULTI-STACKED LAYERS
Methods for fabricating a 3D NAND flash memory are disclosed. The method includes the steps of forming a hardmask pattern on the hardmask layer, and using the...
2017/0365486 PATTERN PROCESSING METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE PRODUCT, AND PRETREATMENT LIQUID...
Provided are a pattern processing method for applying a pretreatment liquid for modifying the surface of a pattern structure to a semiconductor substrate...
2017/0365485 ION BEAM ETCHING
Pattern-multiplication via a multiple step ion beam etching process utilizing multiple etching steps. The ion beam is stationary, unidirectional or...
2017/0365484 PRINTING OF THREE-DIMENSIONAL METAL STRUCTURES WITH A SACRIFICIAL SUPPORT
A method for 3D printing includes printing a first metallic material on a substrate as a support structure (48). A second metallic material, which is less...
2017/0365483 ATOMIC LAYER DEPOSITION METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
A method for manufacturing semiconductor structure is disclosed. The method includes: providing a semiconductor substrate; hydrogenizing a surface of the...
2017/0365482 Method For Growing NI-Containing Thin Film With Single Atomic Layer Deposition Technology
The present invention provides a method for growing ni-containing thin film with single atomic layer deposition technology, comprising steps of: A) placing a...
2017/0365481 SEMICONDUCTOR STRUCTURES
Methods of fabricating a semiconductor structure comprise forming an opening through a stack of alternating tier dielectric materials and tier control gate...
2017/0365480 HYDROGENATION AND NITRIDIZATION PROCESSES FOR MODIFYING EFFECTIVE OXIDE THICKNESS OF A FILM
Embodiments described herein generally relate to enable the formation of a metal gate structure with a reduced effective oxide thickness over a similar...
2017/0365479 SEMICONDUCTOR DEVICE
The present disclosure provides semiconductor devices and fabrication methods thereof. A work function layer is formed on the semiconductor substrate. A buffer...
2017/0365478 NOVEL METHODS OF ATOMIC LAYER ETCHING (ALE) USING SEQUENTIAL, SELF-LIMITING THERMAL REACTIONS
The invention includes a method of promoting atomic layer etching (ALE) of a surface. In certain embodiments, the method comprises sequential reactions with a...
2017/0365477 PROVIDING A TEMPORARY PROTECTIVE LAYER ON A GRAPHENE SHEET
Embodiments of the disclosed technology include patterning a graphene sheet for biosensor and electronic applications using lithographic patterning techniques....
2017/0365476 CREATION OF HYPERDOPED SEMICONDUCTORS WITH CONCURRENT HIGH CRYSTALLINITY AND HIGH SUB-BANDGAP ABSORPTANCE USING...
In one aspect, a method of processing a semiconductor substrate is disclosed, which comprises incorporating at least one dopant in a semiconductor substrate so...
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