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Patent # Description
2018/0006128 METHOD AND STRUCTURE FOR FORMING MOSFET WITH REDUCED PARASITIC CAPACITANCE
A method (and structure) of fabricating an MOSFET (metal-oxide-semiconductor field-effect transistor), includes, on a gate structure coated with a high-k...
2018/0006126 MIRRORED CONTACT CMOS WITH SELF-ALIGNED SOURCE, DRAIN, AND BACK-GATE
A semiconductor device and method of forming a semiconductor device including an inverted field effect transistor having metal filled front-side source and...
2018/0006123 SEMICONDUCTOR DEVICE HAVING A JUNCTION PORTION CONTACTING A SCHOTTKY METAL
A semiconductor device according to the present invention includes a first conductive-type SiC semiconductor layer, and a Schottky metal, comprising molybdenum...
2018/0006122 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device, including a substrate, a deposition layer deposited on the substrate, a semiconductor region selectively provided in the deposition...
2018/0006121 Doped Diamond Semi-Conductor and Method of Manufacture
A doped diamond semiconductor and method of production using a laser is disclosed herein. As disclosed, a dopant and/or a diamond or sapphire seed material may...
2018/0006120 INSULATED GATE TURN-OFF DEVICE WITH HOLE INJECTOR FOR FASTER TURN OFF
An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n- epi layer, a p-well,...
2018/0006119 STRAINED AND UNSTRAINED SEMICONDUCTOR DEVICE FEATURES FORMED ON THE SAME SUBSTRATE
Embodiments are directed to a method of forming a feature of a semiconductor device. The method includes forming the feature from a semiconductor material...
2018/0006116 BIOSENSOR BASED ON HETEROJUNCTION BIPOLAR TRANSISTOR
In one example, a sensor includes a heterojunction bipolar transistor and component sensing surface coupled to the heterojunction bipolar transistor via an...
2018/0006115 Power Semiconductor Device Having Fully Depleted Channel Region
A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, first and second cells electrically connected...
2018/0006114 SEMICONDUCTOR DEVICE INCLUDING CRYSTAL DEFECT REGION AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes: an n type semiconductor layer including an active region and an inactive region; an element structure formed in the active...
2018/0006112 THREE-DIMENSIONAL TRANSISOR
The disclosed subject matter provides a method for fabricating a three-dimensional transistor. The method includes forming an active region and two isolation...
2018/0006111 METHODS OF FORMING A PROTECTION LAYER ON AN ISOLATION REGION OF IC PRODUCTS COMPRISING FINFET DEVICES
One illustrative method disclosed herein includes, among other things, forming a plurality of trenches in a semiconductor substrate so as to define a plurality...
2018/0006110 Power Semiconductor Device Having Fully Depleted Channel Regions
A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, an active cell field in the body, and a...
2018/0006107 ACTIVE-MATRIX TOUCHSCREEN
An active-matrix touchscreen includes a substrate, a system controller, and a plurality of spatially separated independent touch elements disposed on the...
2018/0006105 DISPLAY DEVICE
Disclosed is a display device, including: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area as a plurality of pixel...
2018/0006104 DISPLAY DEVICE HAVING SIGNAL LINE EXTENDING TO NON-DISPLAY AREA
A display device according to an embodiment includes a display panel and a circuit board connected to the display panel. The circuit board is connected to a...
2018/0006103 THIN FILM TRANSISTOR ARRAY SUBSTRATE AND ORGANIC LIGHT-EMITTING DIODE DISPLAY
A thin film transistor (TFT) array substrate includes: a substrate; a first insulation layer on the substrate; a capacitor including a lower electrode on the...
2018/0006102 BACKPLANE SUBSTRATE, MANUFACTURING METHOD FOR THE SAME, AND ORGANIC LIGHT-EMITTING DISPLAY DEVICE USING THE SAME
Disclosed are a backplane substrate, which is devised to attain circuit characteristics for realizing sufficient gradation even in smaller pixels of a...
2018/0006101 ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE
Disclosed is an organic light emitting diode display device capable of transmitting a sensing value through an EPI interface without a separate line B-LVDS...
2018/0006092 ELECTRONIC ELEMENT AND DISPLAY
The present invention relates inter alia to a color display comprising nanoparticles and color filters.
2018/0006090 ORGANIC PHOTOELECTRONIC DEVICE AND IMAGE SENSOR
An organic photoelectronic device includes a first electrode and a second electrode facing each other and a light-absorption layer between the first electrode...
2018/0006089 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device according to an embodiment includes: a stacked body including a plurality of first conductive films stacked via an inter-layer...
2018/0006088 RESISTIVE RANDOM ACCESS MEMORY (ReRAM) DEVICE
One example includes a resistive random access memory (ReRAM) device. The device includes a set of electrodes to receive a voltage. The device also includes a...
2018/0006087 METHOD FOR BASE CONTACT LAYOUT, SUCH AS FOR MEMORY
Embodiments disclosed herein may relate to forming a base contact layout in a memory device.
2018/0006086 STRUCTURE AND METHOD FOR MEMORY CELL ARRAY
A memory cell array structure includes memory cells arranged in m rows and n columns on a substrate, and n columns of first and second well regions with...
2018/0006083 SYSTEMS AND METHODS FOR TRANSFER OF MICRO-DEVICES
An apparatus for positioning micro-devices on a substrate includes one or more supports to hold a donor substrate and a destination substrate, an adhesive...
2018/0006079 MULTI-JUNCTION PIXEL IMAGE SENSOR WITH DIELECTRIC REFLECTOR BETWEEN PHOTODETECTION LAYERS
Some embodiments provide a color image sensor and color image sampling method that uses multiple-layer pixels and is capable of producing color images without...
2018/0006077 IMAGE SENSOR HAVING PHOTODIODES SHARING ONE COLOR FILTER AND ONE MICRO-LENS
An image sensor is provides. The image sensor may include first and second photodiodes, a first color filter shared by the first and the second photodiodes,...
2018/0006072 BACKSIDE ILLUMINATED PHOTOSENSOR ELEMENT WITH LIGHT PIPE AND LIGHT MIRROR STRUCTURES
A photosensor is formed within a semiconductor substrate layer having a front side and a back side. An isolation structure delimits an active region of the...
2018/0006067 ELECTROMAGNETIC WAVE DETECTOR AND ELECTROMAGNETIC WAVE DETECTOR ARRAY
An electromagnetic wave detector includes: a substrate; an insulating layer provided on the substrate; a graphene layer provided on the insulating layer; a...
2018/0006065 ARRAY SUBSTRATE AND DISPLAY DEVICE AND METHOD FOR MAKING THE ARRAY SUBSTRATE
A method for making an array substrate includes the following steps: forming a poly-silicon semiconductor layer on a substrate; forming a buffer layer on the...
2018/0006063 SEMICONDUCTOR DEVICE AND FINFET TRANSISTOR
The present disclosure provides semiconductor devices, fin field-effect transistors and fabrication methods thereof. An exemplary fin field-effect transistor...
2018/0006060 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
It is an object of the present invention to form a pixel electrode and a metal film using one resist mask in manufacturing a stacked structure by forming the...
2018/0006059 DISPLAY DEVICE AND HAND-HELD ELECTRONIC DEVICE
An electronic device includes a liquid crystal display device having a first substrate, a second substrate bonded to the first substrate, with liquid crystal...
2018/0006055 THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
A three-dimensional semiconductor memory device is provided. A stacked structure is formed on a substrate. The stacked structure includes conductive patterns...
2018/0006054 METHODS AND APPARATUS FOR THREE-DIMENSIONAL NAND NON-VOLATILE MEMORY DEVICES WITH SIDE SOURCE LINE AND...
A method of fabricating a monolithic three dimensional memory structure is provided. The method includes forming a stack of alternating word line and...
2018/0006051 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device according to an embodiment, includes a plurality of semiconductor pillars extending in a first direction and being arranged along...
2018/0006050 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a...
2018/0006048 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A control gate electrode and a memory gate electrode of a memory cell of a non-volatile memory are formed in a memory cell region of a semiconductor substrate,...
2018/0006047 SEMICONDUCTOR DEVICE
A semiconductor device includes a common source region formed in a semiconductor substrate, a bit line formed over the semiconductor substrate, first and...
2018/0006046 Semiconductor Structure and Method for Forming the Same
A semiconductor structure includes a semiconductor substrate, at least one raised dummy feature, at least one memory cell, and at least one word line. The...
2018/0006043 PREPARATION METHOD FOR FLAT CELL ROM DEVICE
A preparation method for a flat cell ROM device, comprising the steps of: providing a substrate, and forming a P well on the substrate; forming a photomask...
2018/0006041 METHOD OF MAKING THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE HAVING UNIFORM THICKNESS SEMICONDUCTOR CHANNEL
A method of manufacturing a semiconductor device includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a...
2018/0006039 SEMICONDUCTOR DEVICE, STATIC RANDOM ACCESS MEMORY CELL AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a first semiconductor fin, a second semiconductor fin, an n-type epitaxy structure, a p-type epitaxy structure,...
2018/0006036 FABRICATION OF VERTICAL DOPED FINS FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS
A method of forming a fin field effect transistor (finFET) with a doped substrate region, including forming a plurality of vertical fins on a substrate,...
2018/0006033 INTEGRATED METAL GATE CMOS DEVICES
A semiconductor device comprises a first semiconductor fin arranged on a substrate, the first semiconductor fin having a first channel region, and a second...
2018/0006027 POWER SEMICONDUCTOR DEVICE HAVING FULLY DEPLETED CHANNEL REGIONS
A power semiconductor device is disclosed. In one example, the device includes a semiconductor body coupled to a first load terminal structure and a second...
2018/0006022 3D BONDED SEMICONDUCTOR STRUCTURE WITH AN EMBEDDED CAPACITOR
A first semiconductor structure including a first bonding oxide layer having a first metallic structure embedded therein and a second semiconductor structure...
2018/0006021 BIASED TRANSISTOR MODULE
A biased-transistor-module comprising: a module-input-terminal; a module-output-terminal; a reference-terminal; a module-supply-terminal configured to receive...
2018/0006018 POWER CONVERTER AND SEMICONDUCTOR DEVICE
A power converter includes a semiconductor element disposed on a substrate, a thermistor element for detecting the temperature of the substrate, the thermistor...
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