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Patent # Description
2018/0012936 ELECTRONIC DEVICE
An electronic device is provided to comprise a semiconductor memory unit that comprises: a substrate including active regions, which are extended in a second...
2018/0012929 LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF
A light-emitting device comprises a carrier; a first semiconductor element formed on the carrier and comprising a first semiconductor structure and a second...
2018/0012927 SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE
The present technology relates to a solid-state imaging device and an electronic device capable of improving a saturation characteristic. A photo diode is...
2018/0012923 Array Imaging Module and Molded Photosensitive Assembly and Manufacturing Method Thereof for Electronic Device
An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive...
2018/0012922 OPTICAL DEVICE FOR EXPOSURE OF A SENSOR DEVICE FOR A VEHICLE
The invention relates to an optical device (100) for exposure of a sensor device (10) for a vehicle (1) with an optical structure (101) which comprises an...
2018/0012920 SENSOR PACKAGE STRUCTURE
A sensor package structure includes a substrate, a sensor chip disposed on the substrate, several metal wires electrically connected to the substrate and the...
2018/0012919 SENSOR PACKAGE STRUCTURE
A sensor package structure includes a substrate, a sensor chip disposed on the substrate, several metal wires electrically connected to the substrate and the...
2018/0012917 GERMANIUM-SILICON LIGHT SENSING APPARATUS
A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for...
2018/0012915 POWER STORAGE ELEMENT, MANUFACTURING METHOD THEREOF, AND POWER STORAGE DEVICE
Disclosed is a power storage element including a positive electrode current collector layer and a negative electrode current collector layer which are arranged...
2018/0012914 LASER CRYSTALLIZATION APPARATUS AND METHOD OF DRIVING THE SAME
A laser crystallization apparatus includes a laser generating module configured to generate a laser beam, an optical module configured to guide the laser beam,...
2018/0012913 THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE USING THE SAME
A thin film transistor (TFT) substrate and a display device using the same are disclosed. The TFT substrate includes a first TFT including a polycrystalline...
2018/0012912 SEMICONDUCTOR DEVICE
A novel semiconductor device in which a metal film containing copper (Cu) is used for a wiring, a signal line, or the like in a transistor including an oxide...
2018/0012911 Digital Circuit Having Correcting Circuit and Electronic Apparatus Thereof
Provided is a digital circuit (30) that comprises: a switching circuit (31) having first transistors (32, 33) supplied with power supply potentials (VDD, VSS):...
2018/0012910 METAL OXIDE AND SEMICONDUCTOR DEVICE
A novel metal oxide is provided. The metal oxide has a plurality of energy gaps, and includes a first region having a high energy level of a conduction band...
2018/0012908 MATRIX DEVICE AND MANUFACTURING METHOD OF MATRIX DEVICE
In a matrix device having two or more systems of electrode groups such as X and Y systems, the one or more electrode groups are grouped into groups each...
2018/0012906 POWER GATE SWITCHING SYSTEM
A semiconductor device includes: a virtual power line extended in a first direction; an n-well extended in the first direction, wherein the virtual power line...
2018/0012905 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Disclosed is a method of manufacturing a semiconductor device, including: forming a slacked structure including first material layers and second material...
2018/0012904 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE INCLUDING BARRIER PATTERN
The invention is related to a method for manufacturing a semiconductor device having a barrier pattern. The method includes alternately forming first...
2018/0012902 Semiconductor Device Including a Dielectric Layer
A semiconductor device including a dielectric layer is provided. The semiconductor device includes a stack structure, and a vertical structure within the stack...
2018/0012900 INTEGRATED CIRCUITS
The present subject matter relates to an integrated circuit comprising an erasable programmable read only memory (EPROM) array having a plurality of EPROM...
2018/0012899 INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THEREOF
A method for manufacturing an integrated circuit includes following steps. A substrate including a memory region and a core region is provided. At least two...
2018/0012898 NVM MEMORY HKMG INTEGRATION TECHNOLOGY
The present disclosure relates to an integrated circuit (IC) that includes a HKMG hybrid non-volatile memory (NVM) device and that provides small scale and...
2018/0012896 METHOD FOR PRODUCING PILLAR-SHAPED SEMICONDUCTOR DEVICE
A method for producing a pillar-shaped semiconductor device includes forming, above a NiSi layer serving as a lower wiring conductor layer and connecting to an...
2018/0012894 METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE
A method of manufacturing an integrated circuit device includes forming multilayered stack structures that extend parallel to and separated from one another on...
2018/0012893 Method of Maintaining the State of Semiconductor Memory Having Electrically Floating Body Transistor
Methods of maintaining a state of a memory cell without interrupting access to the memory cell are provided, including applying a back bias to the cell to...
2018/0012892 SEMICONDUCTOR STRUCTURE CONTAINING LOW-RESISTANCE SOURCE AND DRAIN CONTACTS
Semiconductor structures having a source contact and a drain contact that exhibit reduced contact resistance and methods of forming the same are disclosed. In...
2018/0012890 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A manufacturing method of a semiconductor device, comprising the following steps: providing a semiconductor substrate comprising a low-voltage device region...
2018/0012886 ON-DIE SYSTEM ELECTROSTATIC DISCHARGE PROTECTION
Some embodiments include apparatus and methods using a first transistor coupled between a node and a supply node, a second transistor coupled between the node...
2018/0012885 ARRAY SUBSTRATE, DISPLAY DEVICE AND MANUFACTURING METHOD OF ARRAY SUBSTRATE
Embodiments of the invention provide an array substrate, a display device and a manufacturing method of the array substrate. The array substrate comprises a...
2018/0012884 ELECTRONIC DEVICE AND METHOD FOR OPERATING THE SAME
Provided are an electronic device and control method therefor. The electronic device may include: a first electronic component; a second electronic component...
2018/0012882 SEMICONDUCTOR STRUCTURE FOR ELECTROSTATIC DISCHARGE PROTECTION
A semiconductor structure for electrostatic discharge (ESD) protection is provided. The semiconductor structure includes a substrate, a first doped well, a...
2018/0012880 THINNING PROCESS USING METAL-ASSISTED CHEMICAL ETCHING
Methods for forming a chip package are provided. The method includes providing at least one carrier substrate including first semiconductor dies mounted...
2018/0012879 ENHANCED POWER DISTRIBUTION TO APPLICATION SPECIFIC INTEGRATED CIRCUITS (ASICS)
Presented herein is a method and apparatus for enhanced power distribution to application specific integrated circuits (ASICs). The apparatus includes a...
2018/0012878 THERMALLY ENHANCED PACKAGE TO REDUCE THERMAL INTERACTION BETWEEN DIES
A method of reducing heat flow between IC chips and the resulting device are provided. Embodiments include attaching plural IC chips to an upper surface of a...
2018/0012877 DIE-DIE STACKING
A method includes forming a stack of semiconductor die. The stack includes a first semiconductor die, a second semiconductor die and a third semiconductor die....
2018/0012876 PIXEL STRUCTURE, DISPLAY APPARATUS INCLUDING THE PIXEL STRUCTURE, AND METHOD OF MANUFACTURING THE PIXEL STRUCTURE
A pixel structure of a display apparatus includes an electrode line, at least one ultra small light-emitting diode, and a connection electrode. The electrode...
2018/0012872 MOLDED LED PACKAGE WITH LAMINATED LEADFRAME AND METHOD OF MAKING THEREOF
A method of packaging light emitting diodes (LEDs) includes molding a lead frame containing a plurality of lead frame fingers that are parallel to each other...
2018/0012871 RECESSED AND EMBEDDED DIE CORELESS PACKAGE
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a cavity in...
2018/0012868 THREE-DIMENSIONAL STACKING STRUCTURE
A three-dimensional stacking structure is described. The stacking structure includes at least a bottom die, a top die and a spacer protective structure. The...
2018/0012866 SEMICONDUCTOR PACKAGE
A semiconductor package includes a first semiconductor chip including a first through-silicon via (TSV), a second semiconductor chip stacked on the first...
2018/0012865 THERMAL TRANSFER STRUCTURES FOR SEMICONDUCTOR DIE ASSEMBLIES
Several embodiments of the present technology are described with reference to a semiconductor die assembly and processes for manufacturing the assembly. In...
2018/0012864 Dense Assembly of Laterally Soldered, Overmolded Chip Packages
Embodiments of the invention are directed to an integrated circuit (IC) package assembly, including: one or more printed circuit boards (PCBs); and a set of...
2018/0012862 Chip-On-Wafer Package and Method of Forming Same
A method includes bonding a die to a substrate, where the substrate has a first redistribution structure, the die has a second redistribution structure, and...
2018/0012858 RARE EARTH INTERLAYS FOR MECHANICALLY LAYERING DISSIMILAR SEMICONDUCTOR WAFERS
Structures described herein may include mechanically bonded interlayers for formation between a first Group III-V semiconductor layer and a second...
2018/0012856 SEMICONDUCTOR PACKAGE HAVING A SOLDER-ON-PAD STRUCTURE
A semiconductor package and methods for producing the same are described. One example of the semiconductor package is described to include a substrate having a...
2018/0012855 PRE-PLATED SUBSTRATE FOR DIE ATTACHMENT
A method for attaching a semiconductor die to a substrate includes providing a substrate that includes an attachment layer at a surface of the substrate. The...
2018/0012854 ENHANCED SOLDER PAD
A solder pad includes a surface. A tin layer is arranged on the surface. At least one out of a bismuth layer, an antimony layer and a nickel layer is arranged...
2018/0012853 CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
A chip package includes a chip, an isolation layer on the bottom surface and the sidewall, a redistribution layer that is on the isolation layer and in...
2018/0012850 TRAP LAYER SUBSTRATE STACKING TECHNIQUE TO IMPROVE PERFORMANCE FOR RF DEVICES
Some embodiments of the present disclosure are directed to a device. The device includes a substrate comprising a silicon layer disposed over an insulating...
2018/0012849 INTEGRATED CIRCUIT CHIP WITH REVERSE ENGINEERING PREVENTION
An integrated circuit chip with reverse engineering prevention includes: a signal generator part configured to generate a first signal; a metal line part...
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