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Patent # Description
2018/0190800 ELECTRONIC DEVICE INCLUDING A TUNNEL LAYER
An electronic device includes a semiconductor layer, a tunneling layer formed of a material including a two-dimensional (2D) material so as to directly contact...
2018/0190799 Devices Having a Semiconductor Material That Is Semimetal in Bulk and Methods of Forming the Same
Devices, and methods of forming such devices, having a material that is semimetal when in bulk but is a semiconductor in the devices are described. An example...
2018/0190798 OXIDE THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND DISPLAY PANEL AND DISPLAY DEVICE INCLUDING...
Disclosed are an oxide thin film transistor (TFT), a method of manufacturing the same, a display panel including the oxide TFT, and a display device including...
2018/0190797 TRANSISTOR STRUCTURE WITH VARIED GATE CROSS-SECTIONAL AREA
Aspects of the present disclosure include finFET structures with varied cross-sectional areas and methods of forming the same. Methods according to the present...
2018/0190796 Devices Including Gate Spacer with Gap or Void and Methods of Forming the Same
Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance...
2018/0190795 Array Substrate, Manufacturing Method Thereof, and Display Device
The present disclosure provides an array substrate, the array substrate being divided into a plurality of pixel units, each of which is provided with a thin...
2018/0190794 METHOD OF FORMING VERTICAL TRANSISTOR HAVING DUAL BOTTOM SPACERS
A method of forming a spacer for a vertical transistor is provided. The method includes forming a fin structure on a substrate, depositing a first spacer on...
2018/0190793 METHODS FOR FORMING SEMICONDUCTORS BY DIFFUSION
In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in...
2018/0190792 METHOD OF FORMING SEMICONDUCTOR STRUCTURE AND RESULTING STRUCTURE
The disclosure is directed to a semiconductor structure and method of forming same. The method including: implanting a species within a region of a substrate...
2018/0190791 TRANSIENT VOLTAGE SUPPRESSION DEVICES WITH SYMMETRIC BREAKDOWN CHARACTERISTICS
The present disclosure relates to a symmetrical, punch-through transient voltage suppression (TVS) device includes a mesa structure disposed on a semiconductor...
2018/0190790 NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A nitride semiconductor device includes: an electron transit layer including Ga.sub.xIn.sub.1-xN (0<x.ltoreq.1); an electron supply layer formed on the...
2018/0190789 METHOD AND SYSTEM FOR IN-SITU ETCH AND REGROWTH IN GALLIUM NITRIDE BASED DEVICES
A method of regrowing material includes providing a III-nitride structure including a masking layer and patterning the masking layer to form an etch mask. The...
2018/0190788 DEVICES WITH STRAINED SOURCE/DRAIN STRUCTURES AND METHOD OF FORMING THE SAME
A device includes a substrate and a gate structure over the substrate. The device further includes source/drain (S/D) features in the substrate. At least one...
2018/0190787 METHOD AND STRUCTURE FOR PROTECTING GATES DURING EPITAXIAL GROWTH
Embodiments of the present invention provide methods and structures for protecting gates during epitaxial growth. An inner spacer of a first material is...
2018/0190786 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
The present invention discloses a manufacturing method for a semiconductor device. The manufacturing method includes: providing a substrate; forming a...
2018/0190785 SEMICONDUCTOR DEVICE HAVING ASYMMETRIC SPACER STRUCTURES
A semiconductor device including a semiconductor substrate, agate on the semiconductor substrate, a drain doping region in the semiconductor substrate on a...
2018/0190784 SHARED METAL GATE STACK WITH TUNABLE WORK FUNCTION
Semiconductor devices include at least one semiconductor fin in each of a first region and a second region. A first work function stack that includes a bottom...
2018/0190783 SEMICONDUCTOR DEVICE AND METHOD OF FORMATION
A semiconductor device and method of formation are provided. The semiconductor device includes a channel surrounding a dielectric tube and a gate surrounding...
2018/0190782 GATE-ALL-AROUND FIELD EFFECT TRANSISTOR HAVING MULTIPLE THRESHOLD VOLTAGES
One example of an apparatus includes a conducting channel region. The conducting channel region includes a plurality of epitaxially grown, in situ doped...
2018/0190781 GATE CUT DEVICE FABRICATION WITH EXTENDED HEIGHT GATES
Semiconductor devices and methods of forming the same include forming a dummy gate structure across multiple device regions that includes a dummy gate and a...
2018/0190780 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes an active region in a shape of a fin extending in a first direction, the fin having source/drain regions spaced apart therein,...
2018/0190779 SEMICONDUCTOR DEVICE AND FABRICATION METHOD
The position of the side wall of a metal electrode is precisely controlled and the coverage of a layer above the metal electrode is improved. A semiconductor...
2018/0190778 TRANSISTOR WITH SOURCE FIELD PLATES UNDER GATE RUNNER LAYERS
A transistor device includes a field plate extending from a source contact layer and defining an opening above a gate metal layer. Coplanar with the source...
2018/0190777 TRANSISTOR WITH SOURCE FIELD PLATES AND NON-OVERLAPPING GATE RUNNER LAYERS
A transistor device includes a field plate that extends from a source runner layer and/or a source contact layer. The field plate can be coplanar with and/or...
2018/0190776 SEMICONDUCTOR CHIP PACKAGE WITH CAVITY
Various embodiments disclosed relate to a semiconductor package. The semiconductor package includes a substrate having first and second opposed major surfaces....
2018/0190775 METHOD FOR FABRICATING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVICE
In a method for fabricating a semiconductor substrate according to an embodiment, an SiC substrate is formed by vapor growth and C (carbon) is introduced into...
2018/0190774 DIAMOND SUBSTRATE AND METHOD FOR PRODUCING THE SAME
Provided is a self-support diamond substrate made of diamond and a method for producing such a substrate. A foundation substrate is prepared, several pieces of...
2018/0190773 METAL OXIDE SEMICONDUCTOR DEVICE HAVING MITIGATED THRESHOLD VOLTAGE ROLL-OFF AND THRESHOLD VOLTAGE ROLL-OFF...
The present invention provides a MOS (Metal-Oxide-Silicon) device having mitigated threshold voltage roll-off and a threshold voltage roll-off mitigation...
2018/0190772 SEMICONDUCTOR DEVICES
A semiconductor device includes a device isolation layer on a substrate, a first active pattern defined by the device isolation layer, and source/drain...
2018/0190771 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
The present invention provides a semiconductor structure, the semiconductor structure includes a substrate, at least one active area is defined on the...
2018/0190770 HIGH DENSITY MEMORY CELL STRUCTURES
The present disclosure relates to semiconductor structures and, more particularly, to vertical memory cell structures and methods of manufacture. The vertical...
2018/0190769 Vertical Gate-All-Around Transistor with Top and Bottom Source/Drain Epitaxy on a Replacement Nanowire, and...
After providing a Group IV semiconductor nanowire on a substrate, a sacrificial material portion is formed on sidewalls of a bottom portion of the Group IV...
2018/0190768 STRAIN RETENTION SEMICONDUCTOR MEMBER FOR CHANNEL SiGe LAYER OF pFET
A pFET includes a semiconductor-on-insulator (SOI) substrate; and a trench isolation within the SOI substrate, the trench isolation including a raised portion...
2018/0190767 SEMICONDUCTOR DEVICE
A semiconductor device is disclosed. The semiconductor device includes a substrate structure including a high side region, a low side region, a level shift...
2018/0190766 HIGH VOLTAGE JUNCTION TERMINATING STRUCTURE OF HIGH VOLTAGE INTEGRATED CIRCUIT
A HVJT structure of HVIC includes P-type substrate. Epitaxial layer is formed on the substrate. N-type doped structure is formed in the epitaxial layer,...
2018/0190765 SEMICONDUCTOR DEVICE
A semiconductor device including a substrate of a first conductivity type, a metal-oxide-semiconductor-field-effect transistor (MOSFET), junction gate...
2018/0190764 SEMICONDUCTOR DEVICE
A semiconductor device including a substrate, a metal-oxide-semiconductor field-effect transistor (MOSFET), and a plurality of junction gate field-effect...
2018/0190763 HIGH-VOLTAGE SEMICONDUCTOR DEVICE
High-voltage semiconductor devices are provided. The high-voltage semiconductor device includes a substrate having a first conductive type and a gate region...
2018/0190762 FLEXIBLE SUBSTRATE LAMINATION BODY FOR REDUCING SURFACE STRAIN AND FLEXIBLE ELECTRONIC DEVICE COMPRISING SAME
Disclosed is a flexible substrate laminate including a flexible substrate and a base member configured to reduce strain of the flexible substrate on one...
2018/0190761 MIM CAPACITOR WITH ENHANCED CAPACITANCE
A metal-insulator-metal (MIM) capacitor is disclosed. The MIM capacitor includes a substrate having a first dielectric layer thereon and a bottom electrode...
2018/0190760 ADVANCED METAL INSULATOR METAL CAPACITOR
A pattern is defined in a dielectric layer. The dielectric layer includes a low-k dielectric region and a high-k dielectric region. The high-k dielectric...
2018/0190759 ADVANCED METAL INSULATOR METAL CAPACITOR
A pattern is defined in a dielectric layer. The dielectric layer includes a low-k dielectric region and a high-k dielectric region. The high-k dielectric...
2018/0190758 ADVANCED METAL INSULATOR METAL CAPACITOR
A method for fabricating an advanced metal insulator metal capacitor structure includes providing a pattern in a dielectric layer. The pattern includes a set...
2018/0190757 ADVANCED METAL INSULATOR METAL CAPACITOR
A method for fabricating an advanced metal insulator metal capacitor structure includes providing a pattern in a dielectric layer. The pattern includes a set...
2018/0190756 ADVANCED METAL INSULATOR METAL CAPACITOR
A method for fabricating an advanced metal insulator metal capacitor structure includes providing a pattern in a dielectric layer. The pattern includes a set...
2018/0190755 PRECISE/DESIGNABLE FINFET RESISTOR STRUCTURE
A resistive material is formed straddling over each semiconductor fin that extends upward from a surface of a substrate. The resistive material is then...
2018/0190754 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
A semiconductor device includes a substrate having a first conductivity type, a first well formed in the substrate and having a second conductivity type, a...
2018/0190753 SEMICONDUCTOR RESISTOR STRUCTURE AND METHOD FOR MAKING
Disclosed examples include a resistor comprising a semiconductor structure having a length dimension with first and second ends spaced from one another and an...
2018/0190752 DISPLAY DEVICE
A display device may includes: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area of the substrate, each of the pixels...
2018/0190751 Organic Light Emitting Display Device
Embodiments relate to an organic light emitting display device according to the present disclosure including: a plurality of pixels which includes red, white,...
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