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| Patent # | Description |
|---|---|
| 2018/0190598 |
DISPLAY APPARATUS AND FABRICATING METHOD THEREOF The present application discloses a display apparatus having a driver integrated circuit (IC) bonding area for bonding a plurality of signal lines with a... |
| 2018/0190597 |
GUARD RING STRUCTURE AND METHOD FOR FORMING THE SAME A method for forming a seal ring structure provides a semiconductor substrate having a first doping region formed over a top portion thereof. The method forms... |
| 2018/0190596 |
STANDOFF MEMBERS FOR SEMICONDUCTOR PACKAGE Semiconductor packages having support members are provided. Support members can mitigate damage to a semiconductor die mounted on a semiconductor package. In... |
| 2018/0190595 |
RADIO REQUENCY MODULE AND METHOD FOR MANUFATURING THE SAME A radio frequency module includes a wiring substrate, a plurality of components mounted on an upper surface of the wiring substrate, a sealing resin layer... |
| 2018/0190594 |
MANUFACTURING METHOD OF PACKAGE STRUCTURE A manufacturing method of a packaging structure is provided. First, a carrier is provided. A conductive layer is formed on the carrier. A conductive frame is... |
| 2018/0190593 |
CONDUCTIVE ADHESIVE LAYER FOR SEMICONDUCTOR DEVICES AND PACKAGES In various embodiments this disclosure is directed to conductive adhesives layers that can be used, in one example embodiment, to connect one or more shielding... |
| 2018/0190592 |
STRUCTURE AND METHOD TO REDUCE COPPER LOSS DURING METAL CAP FORMATION A copper or copper alloy is formed in a reflow enhancement layer lined opening present in an interconnect dielectric material layer. A ruthenium (Ru) or osmium... |
| 2018/0190591 |
FAN-OUT SEMICONDUCTOR PACKAGE A fan-out semiconductor package includes: a first semiconductor chip; a first encapsulant; a connection member including first vias and a first redistribution... |
| 2018/0190590 |
Packaged Chip and Signal Transmission Method Based on Packaged Chip A packaged chip, including a package structure, a redistribution structure, and a carrier, where the package structure includes a first chip and a second chip... |
| 2018/0190589 |
BENT-BRIDGE SEMICONDUCTIVE APPARATUS A bent-bridge semiconductive apparatus includes a silicon bridge that is integral to a semiconductive device and the silicon bridge is deflected out of... |
| 2018/0190588 |
CONTACTS FOR LOCAL CONNECTIONS The present disclosure relates to semiconductor structures and, more particularly, to contacts for local connections and methods of manufacture. The structure... |
| 2018/0190587 |
SEMICONDUCTOR DEVICE STRUCTURES INCLUDING STAIR STEP STRUCTURES, AND
RELATED SEMICONDUCTOR DEVICES A method of forming a semiconductor device assembly comprises forming tiers comprising conductive structures and insulating structures in a stacked arrangement... |
| 2018/0190586 |
SEMICONDUCTOR MEMORY DEVICE AND A MANUFACTURING METHOD THEREOF A semiconductor memory device and a manufacturing method thereof are provided in the present invention. An under-cut structure is formed at an edge of a bit... |
| 2018/0190585 |
SEMICONDUCTOR DEVICE INCLUDING A POROUS DIELECTRIC LAYER, AND METHOD OF
FORMING THE SEMICONDUCTOR DEVICE A method of forming a semiconductor device, includes forming a conductive layer in a recessed portion of a porous dielectric layer, partially removing a top... |
| 2018/0190584 |
CIRCUITS FOR AND METHODS OF IMPLEMENTING AN INDUCTOR AND A PATTERN GROUND
SHIELD IN AN INTEGRATED CIRCUIT An integrated circuit device is described. The integrated circuit device comprises a substrate; a plurality of metal routing interconnect layers; an inductor... |
| 2018/0190583 |
BONDED STRUCTURES WITH INTEGRATED PASSIVE COMPONENT In various embodiments, a bonded structure is disclosed. The bonded structure can include an element and a passive electronic component directly bonded to the... |
| 2018/0190582 |
SEMICONDUCTOR PACKAGE WITH EMBEDDED MIM CAPACITOR, AND METHOD OF
FABRICATING THEREOF An interposer includes a first redistribution layer, an organic substrate, a capacitor, a hard mask layer, a conductive pillar, and a second redistribution... |
| 2018/0190581 |
Semiconductor Device and Method of Fabricating 3D Package with Short Cycle
Time and High Yield A method of making a semiconductor device comprising the steps of providing a first manufacturing line, providing a second manufacturing line, and forming a... |
| 2018/0190580 |
BONDED STRUCTURES WITH INTEGRATED PASSIVE COMPONENT In various embodiments, a bonded structure is disclosed. The bonded structure can include an element and a passive electronic component having a first surface... |
| 2018/0190579 |
PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF A package structure includes a redistribution layer, at least one bonding electrode, and a mounting layer. The redistribution layer has a first surface, a... |
| 2018/0190578 |
Fan-Out Package Structure and Method A device comprises a semiconductor structure in a molding compound layer, a first polymer layer on the molding compound layer, a second polymer layer on the... |
| 2018/0190577 |
PACKAGED SEMICONDUCTOR DEVICE WITH A PARTICLE ROUGHENED SURFACE A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the... |
| 2018/0190576 |
MODIFIED LEADFRAME DESIGN WITH ADHESIVE OVERFLOW RECESSES The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of... |
| 2018/0190575 |
LEADFRAME WITH LEAD PROTRUDING FROM THE PACKAGE The present disclosure is directed to a leadframe package having leads with protrusions on an underside of the leadframe. The protrusions come in various... |
| 2018/0190574 |
PREFORMED LEAD FRAME A preformed lead frame includes a plurality of lead frame units and intersecting cutting paths extending between two adjacent rows of said lead frame units,... |
| 2018/0190573 |
LEADFRAME INDUCTOR One example includes a device that is comprised of a die, a leadframe, and an electrically conductive material. The die includes a circuit therein. The... |
| 2018/0190572 |
METHOD OF MANUFACTURING SEMICONDUCTOR PRODUCTS, CORRESPONDING
SEMICONDUCTOR PRODUCT AND DEVICE A method for use in manufacturing semiconductor devices such as, e.g., semiconductor power devices includes providing: a semiconductor die provided with... |
| 2018/0190571 |
SEMICONDUCTOR DEVICE HAVING THROUGH-SILICON-VIA AND METHODS OF FORMING THE
SAME Semiconductor devices having a through-silicon-via and methods of forming the same are described herein. As an example, a semiconductor device may include a... |
| 2018/0190570 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE In a semiconductor device, a plurality of small depressions are formed to overlap each other in a first joining region of a back surface of a heat releasing... |
| 2018/0190569 |
Chip Package Structure and Manufacturing Method Thereof A chip package structure, including a substrate, multiple chips and multiple discrete devices that are packaged on an upper surface of the substrate, and a... |
| 2018/0190568 |
CERAMIC METAL CIRCUIT BOARD AND SEMICONDUCTOR DEVICE USING THE SAME The present invention provides a ceramic metal circuit board including a ceramic substrate and metal plates bonded to both surfaces of the ceramic substrate... |
| 2018/0190567 |
PHASE MODULE FOR A POWER CONVERTER The invention relates to a phase module (1) for a power converter (2) comprising at least one switching element (10) and a heatsink (13). In order to improve... |
| 2018/0190566 |
Apparatus and Manufacturing Method An apparatus includes a circuit device, a heat sink fin, and a thermal interface material layer. The thermal interface material layer is thermally coupled to... |
| 2018/0190565 |
THERMAL INTERFACE MATERIAL ON PACKAGE A packaged assembly is disclosed, including thermal interface material dispensed on an organic package and methods of manufacturing. The method includes... |
| 2018/0190564 |
SEMICONDUCTOR DEVICE, CORRESPONDING APPARATUS AND METHOD A semiconductor device, such as a semiconductor power device, includes: a semiconductor die having a semiconductor die front surface, a package formed onto the... |
| 2018/0190563 |
SEMICONDUCTOR DEVICE, CORRESPONDING CIRCUIT AND METHOD A semiconductor device includes a layered package having a semiconductor die embedded therein, the semiconductor die coupled with a thermally-conductive... |
| 2018/0190562 |
ELECTRONIC DEVICE HAVING A GROOVED CHIP An electronic device includes a support plate having a mounting face. An electronic chip has a front face mounted on the mounting face of the support plate. A... |
| 2018/0190561 |
EASILY DETACHABLE CPU CLIP A clip for use with an electronic package, includes a frame structure with a pair of first side bars and a pair of second side bars commonly defining a... |
| 2018/0190560 |
ELECTRONIC PACKAGE ASSEMBLY WITH COMPACT DIE PLACEMENT An electronic package assembly is disclosed. A substrate can have an upper surface area. A first active die can have an upper surface area and a bottom... |
| 2018/0190559 |
Packaged Semiconductor Devices and Methods of Packaging Semiconductor
Devices Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an... |
| 2018/0190558 |
PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF A manufacturing method of a package structure includes at least the following steps. A plurality of conductive connectors are formed on a circuit layer. The... |
| 2018/0190557 |
SEMICONDUCTOR DEVICE INCLUDING AN ENCAPSULATION MATERIAL DEFINING NOTCHES A semiconductor device includes a first contact element, a second contact element, a semiconductor chip, and an encapsulation material. The first contact... |
| 2018/0190556 |
METHODS AND APPARATUS FOR SPARK GAP DEVICES WITHIN INTEGRATED CIRCUITS In a described example, an apparatus includes: an integrated circuit die having multiple terminals; a leadframe having leads for external connections, at least... |
| 2018/0190555 |
Molding Structure for Wafer Level Package Apparatus, and methods of manufacture thereof, in which a molding compound is formed between spaced apart microelectronic devices. The molding compound... |
| 2018/0190554 |
SEMICONDUCTOR DEVICE, METAL ELECTRODE MEMBER, AND METHOD OF MANUFACTURING
THE SEMICONDUCTOR DEVICE On a conductive plate of an insulated substrate, one open end of a main body part of a cylindrical contact member is bonded by solder. In a hollow part of a... |
| 2018/0190553 |
SEMICONDUCTOR DEVICE PACKAGE AND A METHOD OF MANUFACTURING THE SAME A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the... |
| 2018/0190552 |
SEMICONDUCTOR WAFER AND METHOD OF PROBE TESTING A semiconductor test system has a wafer holder with a tape portion and one or more openings through the tape portion. A semiconductor wafer is mounted over the... |
| 2018/0190551 |
TESTING STRUCTURE, AND FABRICATION AND TESTING METHODS THEREOF Testing structures, and their fabrication methods and testing methods are provided. An exemplary testing structure includes a base substrate containing a well... |
| 2018/0190550 |
METHOD AND APPARATUS TO MODEL AND MONITOR TIME DEPENDENT DIELECTRIC
BREAKDOWN IN MULTI-FIELD PLATE GALLIUM... A first set of test structures for a gallium nitride (GaN) transistor that includes N field plates is disclosed, where N is an integer and X is an integer... |
| 2018/0190549 |
SEMICONDUCTOR WAFER WITH SCRIBE LINE CONDUCTOR AND ASSOCIATED METHOD A semiconductor wafer is provided that includes at least two integrated circuits (ICs); a scribe line extends adjacent to the at least two ICs; and a first... |
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