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Patent # Description
2019/0067492 SEMICONDUCTOR DEVICE
In a first aspect of a present inventive subject matter, a semiconductor device includes an n-type semiconductor layer including a first semiconductor as a...
2019/0067491 Vertical Rectifier with Added Intermediate Region
A new semiconductor rectifier structure. In general, a MOS-transistor-like structure is located above a JFET-like deeper structure. The present application...
2019/0067490 SEMICONDUCTOR DEVICES AND MANUFACTURING METHODS THEREOF
A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel...
2019/0067489 THIN FILM TRANSISTOR
Disclosed herein is a thin film transistor including at least an oxide semiconductor layer, a gate insulting film, a gate electrode, a source-drain electrode...
2019/0067488 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
In a method of manufacturing a negative capacitance structure, a ferroelectric dielectric layer is formed over a first conductive layer disposed over a...
2019/0067487 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE
A gate insulating film is formed over an oxide semiconductor film. A gate electrode is formed over the gate insulating film. An interlayer insulating film is...
2019/0067486 SEMICONDUCTOR DEVICE
To provide a semiconductor device including an oxide semiconductor in which a change in electrical characteristics is suppressed or whose reliability is...
2019/0067485 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
A semiconductor structure and fabrication method thereof are provided. The fabrication method includes: providing a base substrate including a substrate and a...
2019/0067484 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes a first fin type pattern on a substrate, a second fin type pattern, parallel to the first fin type pattern, on the substrate,...
2019/0067483 FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
A FinFET device structure and method for forming the same are provided. The method includes forming a plurality of fin structures over a substrate, and the...
2019/0067482 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method for manufacturing a semiconductor device includes forming a fin structure including a well layer, an oxide layer disposed over the well layer and a...
2019/0067481 METHOD OF FORMING A FINFET HAVING A RELAXATION PREVENTION ANCHOR
A method and structure for mitigating strain loss (e.g., in a FinFET channel) includes providing a semiconductor device having a substrate having a substrate...
2019/0067480 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of first gate structures, a plurality of second gate...
2019/0067479 FINFET HAVING A RELAXATION PREVENTION ANCHOR
A method and structure for mitigating strain loss (e.g., in a FinFET channel) includes providing a semiconductor device having a substrate having a substrate...
2019/0067478 FINFET SEMICONDUCTOR DEVICE STRUCTURE WITH CAPPED SOURCE DRAIN STRUCTURES
A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a first fin structure over the base....
2019/0067477 SEMICONDUCTOR STRUCTURE WITH DOPED FIN-SHAPED STRUCTURES AND METHOD OF FABRICATING THE SAME
A semiconductor structure includes a substrate, fin-shaped structures disposed on the substrate, an isolation layer disposed between the fin-shaped structures,...
2019/0067475 DEVICES AND SYSTEMS WITH STRING DRIVERS INCLUDING HIGH BAND GAP MATERIAL AND METHODS OF FORMATION
A device includes a string driver comprising a channel region between a drain region and a source region. At least one of the channel region, the drain region,...
2019/0067474 VERTICAL FINFET WITH IMPROVED TOP SOURCE/DRAIN CONTACT
A polysilicon layer is deposited over the top surface of the source/drain region of a semiconductor fin in a vertical fin field effect transistor and...
2019/0067473 REDUCING MOSFET BODY CURRENT
An illustrative bidirectional MOSFET switch includes a body region, a buried layer, a gate terminal, and a configuration switch. The body region is a...
2019/0067472 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device with improved performance. A channel region and a well region having a lower impurity concentration than the channel region are formed...
2019/0067471 HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOF
A high voltage device is formed in a semiconductor substrate, and includes: a first deep well, a lateral lightly doped region, a high voltage well, an...
2019/0067470 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device which can secure a high breakdown voltage and to which a simplified manufacturing process is applicable and a method for manufacturing...
2019/0067469 EPITAXIAL STRUCTURE OF TRENCH MOSFET DEVICES
This invention discloses a metal oxide semiconductor field effect transistor (MOSFET) device. The MOSFET device has a semiconductor substrate that supports an...
2019/0067468 POWER MODULE FOR SUPPORTING HIGH CURRENT DENSITIES
A power module is disclosed that includes a housing with an interior chamber wherein multiple switch modules are mounted within the interior chamber. The...
2019/0067467 SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF
A method for fabricating a semiconductor structure includes providing a base substrate, including a substrate, a plurality of gate structures formed on the...
2019/0067466 SEMICONDUCTOR DEVICE WITH HIGH-QUALITY EPITAXIAL LAYER AND METHOD OF MANUFACTURING THE SAME
A semiconductor device having a high-quality epitaxial layer and a method of manufacturing the same are provided. According to an embodiment, the semiconductor...
2019/0067465 NOFF III-NITRIDE HIGH ELECTRON MOBILITY TRANSISTOR
A High Electron Mobility Transistor comprising a source and a drain, a III-N buffer layer and a III-N barrier layer jointly forming a 2DEG in the buffer layer...
2019/0067464 DIGITAL ALLOY BASED BACK BARRIER FOR P-CHANNEL NITRIDE TRANSISTORS
A III-nitride power handling device and the process of making the III-nitride power handling device are disclosed that use digital alloys as back barrier layer...
2019/0067463 SEMICONDUCTOR DEVICE
Among trenches disposed in a striped-shape parallel to a front surface of a semiconductor substrate, a gate electrode at a gate potential is provided in a gate...
2019/0067462 SEMICONDUCTOR DEVICE
In a surface layer of a rear surface of the semiconductor substrate, an n.sup.+-type cathode region and a p-type cathode region are each selectively provided....
2019/0067461 BIPOLAR JUNCTION TRANSISTOR AND METHOD FOR FABRICATING THE SAME
A method for fabricating bipolar junction transistor (BJT) includes the steps of: providing a substrate having an emitter region, a base region, and a...
2019/0067460 SEMICONDUCTOR DEVICE
In a bipolar transistor, a collector layer includes three semiconductor layers: an n-type GaAs layer (Si concentration: about 5.times.10.sup.15 cm.sup.-3,...
2019/0067459 TWIN GATE TUNNEL FIELD-EFFECT TRANSISTOR (FET)
A method of manufacturing a vertical transistor device comprises forming a bottom source region on a semiconductor substrate, forming a channel region...
2019/0067458 FinFET Device and Methods of Forming
A finFET device and methods of forming a finFET device are provided. The method includes depositing a dummy gate over and along sidewalls of a fin extending...
2019/0067457 STRUCTURE AND METHOD FOR HIGH-K METAL GATE
A method of forming a gate dielectric material includes forming a high-K dielectric material in a first region over a substrate, where forming the high-K...
2019/0067456 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method of manufacturing a semiconductor device includes forming a fin structure having a stack of alternating first semiconductor layers and second...
2019/0067455 IINTEGRATED CIRCUIT DEVICE INCLUDING ASYMMETRICAL FIN FIELD-EFFECT TRANSISTOR
An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active...
2019/0067454 FinFET Device and Method of Forming Same
A method for forming a semiconductor device includes forming a fin over a substrate, forming an isolation region adjacent the fin, forming a dummy gate...
2019/0067453 METHODS OF FORMING SEMICONDUCTOR STRUCTURES COMPRISING THIN FILM TRANSISTORS INCLUDING OXIDE SEMICONDUCTORS
A method of forming a semiconductor structure comprises forming an array of vertical thin film transistors. Forming the array of vertical thin film transistors...
2019/0067452 STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE WITH NANOWIRES
Structures and formation methods of a semiconductor device structure are provided. The method includes providing a substrate having a base portion and a fin...
2019/0067451 FIN STRUCTURE FOR SEMICONDUCTOR DEVICE
A method of forming first and second fin field effect transistors (finFETs) on a substrate includes forming first and second fin structures of the first and...
2019/0067450 FIN STRUCTURE FOR SEMICONDUCTOR DEVICE
A method of forming first and second fin field effect transistors (finFETs) on a substrate includes forming first and second fin structures of the first and...
2019/0067449 SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF
A method for fabricating a semiconductor device includes providing a semiconductor structure including a semiconductor substrate, a plurality of semiconductor...
2019/0067448 GATE STRUCTURE FOR SEMICONDUCTOR DEVICE
A method of forming a fin field effect transistors (finFET) on a substrate includes forming a fin structure on the substrate, forming a protective layer on the...
2019/0067447 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing at least one fin on a semiconductor...
2019/0067446 Integrated Circuit With a Fin and Gate Structure and Method Making the Same
The present disclosure provides a semiconductor structure. The semiconductor structure includes device fins formed on a substrate; fill fins formed on the...
2019/0067445 Epitaxial Features Confined by Dielectric Fins and Spacers
A semiconductor structure includes a substrate; a first semiconductor fin extending upwardly from the substrate; an isolation structure over the substrate and...
2019/0067444 SELF-ALIGNED EPITAXY LAYER
Semiconductor structures including active fin structures, dummy fin structures, epitaxy layers, a Ge containing oxide layer and methods of manufacture thereof...
2019/0067443 METHOD OF FABRICATING TANTALUM NITRIDE BARRIER LAYER AND SEMICONDUCTOR DEVICE THEREOF
A method of fabricating tantalum nitride barrier layer in an ultra low threshold voltage semiconductor device is provided. The method includes forming a high-k...
2019/0067442 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall...
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