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Patent # Description
2019/0088633 Direct-Bonded LED Arrays and Applications
Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and...
2019/0088632 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device of an embodiment includes a substrate, a metal plate having a main portion having a first width in a first...
2019/0088631 Display Apparatus and Methods
A display includes a plurality of pixel chips, chixels, provided on a substrate. The chixels and the light emitters thereon may be shaped, sized and arranged...
2019/0088630 MICRO-TRANSFER PRINTABLE ELECTRONIC COMPONENT
A micro-transfer printable electronic component includes one or more electronic components, such as integrated circuits or LEDs. Each electronic component has...
2019/0088629 SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
An electronic apparatus includes a wiring board including a main surface on which a first wiring and a second wiring are formed, a first semiconductor device...
2019/0088628 MULTI-CHIP MODULE INCLUDING STACKED POWER DEVICES WITH METAL CLIP
A Multi-Chip Module (MCM) package includes a substrate having a plurality of metal terminals and at least a first die attach area. An encapsulant is around the...
2019/0088627 METHODS OF OPERATING SEMICONDCUTOR DEVICES INCLUDING A CONTROLLER
Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a...
2019/0088626 SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device package includes: (1) a first circuit layer including a first surface and a second surface opposite to the first surface; (2) at least...
2019/0088625 SEMICONDUCTOR DEVICE
A semiconductor device includes a base member having a first surface and a second surface on a side opposite to the first surface, the base member including at...
2019/0088624 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A manufacturing method of a semiconductor device according to the present embodiment includes forming a modified layer with distortion in semiconductor...
2019/0088623 SEMICONDUCTOR PACKAGE
A semiconductor package includes a board, a plurality of semiconductor memory chips, a controller chip, and a sealing resin portion. The plurality of...
2019/0088622 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes a substrate that has a first main surface and a second main surface opposite to the first main surface, a first...
2019/0088621 Semiconductor Device and Method of Forming Embedded Die Substrate, and System-in-Package Modules with the Same
A semiconductor device has a first substrate. A first semiconductor component is disposed on a first surface of the first substrate. A second substrate...
2019/0088620 NOVEL INTEGRATED CIRCUIT STACKING APPROACH
The present disclosure, in some embodiments, relates to a semiconductor package. The semiconductor package includes an interposer substrate laterally...
2019/0088619 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes forming an insulation layer on a support body, selectively forming openings through the insulation...
2019/0088618 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes forming a first metal film on a first insulating region and a first metal region directly adjacent to...
2019/0088617 METHOD FOR ELECTRICAL COUPLING AND ELECTRIC COUPLING ARRANGEMENT
A method for electrically coupling a pad and a front face of a pillar, including shaping the front face pillar, the front face having at least partially a...
2019/0088616 WEDGE TOOL AND WEDGE BONDING METHOD
A bonding tool includes a wedge tool that presses a bonding wire against a principal plane of a structure such as an electrode to which the bonding wire is to...
2019/0088615 APPARATUS AND METHOD FOR PACKAGING COMPONENTS
A component packaging apparatus includes: at least one component supply device; at least one component processing device, which is configured to process...
2019/0088614 MICROELECTRONIC DEVICE HAVING PROTECTED CONNECTIONS AND MANUFACTURING PROCESS THEREOF
A microelectronic device includes a chip housing a functional part and carrying first electrical contact regions in electrical connection with the functional...
2019/0088613 BOND MATERIALS WITH ENHANCED PLASMA RESISTANT CHARACTERISTICS AND ASSOCIATED METHODS
Several embodiments of the present technology are directed to bonding sheets having enhanced plasma resistant characteristics, and being used to bond to...
2019/0088612 SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING SEMICONDUCTOR CHIP, INTEGRATED CIRCUIT DEVICE, AND METHOD FOR...
An integrated circuit device includes a support substrate, a first semiconductor chip and a second semiconductor chip provided on the support substrate, and a...
2019/0088611 "Lead-Free Solder Ball"
A lead-free solder ball is provided which suppresses interfacial peeling in a bonding interface of a solder ball, fusion defects which develop between the...
2019/0088610 LATERALLY EXTENDED CONDUCTIVE BUMP BUFFER
A semiconductor device includes: a conductive structure, a conductive bump extending into the conductive structure and contacting the conductive structure...
2019/0088609 Via Structure for Packaging and a Method of Forming
A via or pillar structure, and a method of forming, is provided. In an embodiment, a polymer layer is formed having openings exposing portions of an underlying...
2019/0088608 ALLOY DIFFUSION BARRIER LAYER
A microelectronic device includes a reflow structure. The reflow structure has a copper-containing member and a solder member, and a barrier layer between...
2019/0088607 MULTICHIP MODULES AND METHODS OF FABRICATION
In a multi-chip module (MCM), a "super" chip (110N) is attached to multiple "plain" chips (110F' "super" and "plain" chips can be any chips). The super chip is...
2019/0088606 METHODS OF MANUFACTURING A MULTI-DEVICE PACKAGE
A multi-device package includes a substrate, at least two device regions, a first redistribution layer, an external chip and a plurality of first connectors....
2019/0088605 SPOKED SOLDER PAD TO IMPROVE SOLDERABILITY AND SELF-ALIGNMENT OF INTEGRATED CIRCUIT PACKAGES
A center pad or paddle that is shaped with three or more curved spires which are symmetrical in form about axis that radiate from the center of the integrated...
2019/0088604 Semiconductor Die Bond Pad with Insulating Separator
A semiconductor die includes a last metallization layer above a semiconductor substrate, a bond pad above the last metallization layer, a passivation layer...
2019/0088603 Antenna in Embedded Wafer-Level Ball-Grid Array Package
A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over...
2019/0088601 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a device region covered with a resin film and a dicing region extending along at least one side of...
2019/0088600 SEMICONDUCTOR PACKAGE STRUCTURE
A semiconductor package structure includes a redistribution structure, a chip, an upper dielectric layer, a plurality of conductive members and an ...
2019/0088599 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a semiconductor substrate having a first surface and a second surface opposite to the first...
2019/0088598 METHOD FOR FORMING THROUGH SUBSTRATE VIAS IN A TRENCH
A device and method for forming through silicon vias (TSVs) in a composite substrate is disclosed. The through substrate via may include an embedded insulating...
2019/0088597 E-FUSE FOR USE IN SEMICONDUCTOR DEVICE
An e-fuse for use in a semiconductor device includes first and second electrodes; a gate metal coupling the first and second electrodes with each other; a...
2019/0088596 E-FUSE FOR USE IN SEMICONDUCTOR DEVICE
An e-fuse for use in a semiconductor device includes first and second electrodes; a gate metal electrically coupling the first and second electrodes with each...
2019/0088595 Wireless Charging Package with Chip Integrated in Coil Center
A package includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar with...
2019/0088594 SEMICONDUCTOR MODULE
A semiconductor module includes a first electronic device in which one terminal is connected to a first wiring line, the other terminal is connected to a...
2019/0088593 SEAM HEALING OF METAL INTERCONNECTS
Embodiments of the present disclosure describe removing seams and voids in metal interconnects and associated techniques and configurations. In one embodiment,...
2019/0088592 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
According to one embodiment, a semiconductor device includes a substrate, a first conductive layer, a second conductive layer, and a contact plug. The first...
2019/0088591 HIGH PERFORMANCE CELL DESIGN IN A TECHNOLOGY WITH HIGH DENSITY METAL ROUTING
In certain aspects, a semiconductor die includes a first doped region, a second doped region, and an interconnect formed from a first middle of line (MOL)...
2019/0088590 MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE AND METHOD FOR CREATING A LAYOUT THEREOF
A method for manufacturing a semiconductor device of one embodiment of the present invention includes: forming an insulation layer to be processed over a...
2019/0088589 Three-Dimensional Memory Devices and Methods for Forming the Same
Embodiments of three-dimensional (3D) memory devices and methods for forming the 3D memory devices are disclosed. In an example, a NAND memory device includes...
2019/0088588 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes first and second insulating plates, a stacked body provided between the first insulating plate and the second insulating...
2019/0088587 MEMORY DEVICE
A memory device comprises electrode layers stacked in a stacking direction. Semiconductor pillars penetrate the electrode layers in the stacking direction....
2019/0088586 MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
A memory device includes a first conductive layer; a second conductive layer provided above the first conductive layer; a plurality of electrode layers stacked...
2019/0088585 Memory Circuits and Routing of Conductive Layers Thereof
A memory circuit memory circuit comprises at least one memory cell for storing a datum. The memory cell is coupled with a word line, a bit line, a bit line...
2019/0088584 Electro-Luminescence Display Device and Driver IC Film Unit for Electro-Luminescence Display Device
A driver IC film unit including a flexible film, a driver IC on a first surface of the flexible film and configured to receive an input signal and convert the...
2019/0088583 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a first board including a plurality of terminals, a semiconductor chip flip-chip mounted to the...
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