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Patent # Description
2019/0097048 SEMICONDUCTOR DEVICE
A semiconductor device including a substrate; a first and second active region on the substrate; a first recess intersecting with the first active region; a...
2019/0097047 METHOD OF FORMING TARGET LAYER SURROUNDING VERTICAL NANOSTRUCTURE
The disclosed technology generally relates to semiconductor fabrication, and more particularly to a method of forming a target layer surrounding a vertical...
2019/0097046 FIELD-EFFECT TRANSISTOR AND METHOD THEREFOR
A transistor includes a trench formed in a semiconductor substrate with the trench having a first sidewall and a second sidewall. A vertical field plate is...
2019/0097045 FIELD-EFFECT TRANSISTOR AND METHOD THEREFOR
A transistor includes a trench formed in a semiconductor substrate. A gate electrode is formed in the trench with a first edge of the gate electrode proximate...
2019/0097044 SEMICONDUCTOR STRUCTURE AND ASSOCIATED FABRICATING METHOD
A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an isolation region adjacent to the drain region; a gate electrode...
2019/0097043 SILICON CARBIDE SEMICONDUCTOR DEVICE
A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate having an n-type drift layer, and a p-type well region formed in a...
2019/0097042 Silicon Carbide Semiconductor Device with Trench Gate Structure and Vertical PN Junction Between Body Region...
A semiconductor device includes trench gate structures that extend from a first surface into a semiconductor body of silicon carbide. The trench gate...
2019/0097041 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes in this order: a semiconductor base body preparing step; a first trench forming step; a first...
2019/0097040 TFT SUBSTRATE, SCANNED ANTENNA HAVING TFT SUBSTRATE, AND METHOD FOR MANUFACTURING TFT SUBSTRATE
A TFT substrate includes a plurality of antenna element regions each including a TFT and a patch electrode electrically connected to a drain electrode of the...
2019/0097039 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
A semiconductor device includes a substrate provided with an electronic device, an interlayer dielectric (ILD) layer formed over the electronic device, a...
2019/0097038 FinFET Device and Method of Forming
A finFET device and a method of forming are provided. The device includes a transistor comprising a gate electrode and a first source/drain region next to the...
2019/0097037 METHOD OF PRODUCING SEMICONDUCTOR DEVICE
A method of producing a semiconductor device including steps (A) and (B). Step (A) is preparing a semiconductor epitaxial wafer including a plurality of device...
2019/0097036 SEMICONDUCTOR DEVICE AND PROCESS OF FORMING THE SAME
A semiconductor device type of field effect transistor (FET) primarily made of nitride semiconductor materials is disclosed. The FET includes a nitride...
2019/0097035 SEMICONDUCTOR DEVICE HAVING FIN STRUCTURES
A semiconductor device structure is provided. The structure includes a semiconductor substrate having a well pick-up region and an active region. Each of the...
2019/0097034 FIELD EFFECT TRANSISTOR AND PROCESS OF FORMING THE SAME
A process of forming a field effect transistor (FET) and a FET are disclosed. The process includes steps of forming a nitride semiconductor layer on a...
2019/0097033 HIGH POWER DEVICE
A high power device including with a first nitride semiconductor layer, a second nitride semiconductor layer formed on the first nitride semiconductor layer,...
2019/0097032 LAYER STRUCTURE FOR A GROUP-Ill-NITRIDE NORMALLY-OFF TRANSISTOR
A layer structure for a normally-off transistor has an electron-supply layer made of a group-III-nitride material, a back-barrier layer made of a...
2019/0097031 Field Plates On Two Opposed Surfaces Of Double-Base Bidirectional Bipolar Transistor: Devices, Methods, And Systems
Dual-base two-sided bipolar power transistors which use an insulated field plate to separate the emitter/collector diffusions from the nearest base contact...
2019/0097030 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A plug electrode is subject to etch back to remain in a contact hole and expose a barrier metal on a top surface of an interlayer insulating film. The barrier...
2019/0097029 Structure and Method for Vertical Tunneling Field Effect Transistor with Leveled Source and Drain
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first...
2019/0097028 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate...
2019/0097027 Memory Cell With Oxide Cap And Spacer Layer For Protecting A Floating Gate From A Source Implant
A method of forming a memory cell, e.g., flash memory cell, may include (a) depositing polysilicon over a substrate, (b) depositing a mask over the...
2019/0097026 Epitaxy Source/Drain Regions of FinFETs and Method Forming Same
A method includes forming isolation regions extending into a semiconductor substrate, and recessing the isolation regions, so that portions of semiconductor...
2019/0097025 Trench Transistors and Methods with Low-Voltage-Drop Shunt to Body Diode
Methods and systems for power semiconductor devices integrating multiple trench transistors on a single chip. Multiple power transistors (or active regions)...
2019/0097024 Vertical FET with Sharp Junctions
VFET devices and techniques for formation thereof having well-defined, sharp source/drain-to-channel junctions are provided. In one aspect, a method of forming...
2019/0097023 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a semiconductor device includes: receiving a semiconductor structure, the semiconductor structure including: a fin structure; a dummy...
2019/0097022 METHOD AND STRUCTURE TO FORM VERTICAL FIN BJT WITH GRADED SIGE BASE DOPING
A device including a vertical fin bipolar junction transistor (BJT) with graded doping SiGe base with molecular layer doping (MLD), where a lower doped base is...
2019/0097021 Epitaxial Features Confined by Dielectric Fins and Spacers
A method includes receiving a substrate; forming on the substrate a semiconductor fin; an isolation structure surrounding the semiconductor fin; and first and...
2019/0097020 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a substrate including a...
2019/0097019 FIELD-EFFECT TRANSISTORS WITH FINS FORMED BY A DAMASCENE-LIKE PROCESS
Methods of forming a structure for a fin-type field-effect transistor and structures for a fin-type field-effect transistor. An etch stop layer, a sacrificial...
2019/0097018 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
To provide a semiconductor device having improved reliability. The semiconductor device has, on a SOI substrate thereof having a semiconductor substrate, an...
2019/0097017 GATE STACKS
Some embodiments disclose a gate stack having a gate (e.g., polysilicon (poly) material) horizontally between shallow trench isolations (STIs), a tungsten...
2019/0097016 RELIABLE GATE CONTACTS OVER ACTIVE AREAS
A method for manufacturing a semiconductor device comprises forming a plurality of fins in an active region, forming a plurality of gates around the plurality...
2019/0097015 METHODS, APPARATUS AND SYSTEM FOR STRINGER DEFECT REDUCTION IN A TRENCH CUT REGION OF A FINFET DEVICE
At least one method, apparatus and system disclosed herein involves forming trench in a gate region, wherein the trench having an oxide layer to a height to...
2019/0097014 ELECTRIC DEVICE BASED ON BLACK PHOSPHOROUS SINGLE CHANNEL WITH MULTI-FUNCTION AND METHOD OF MANUFACTURING THE SAME
The present disclosure provides a multi-functional electronic device with a black phosphorous-based single channel, wherein the device comprises: a black...
2019/0097013 DISHING PREVENTION DUMMY STRUCTURES FOR SEMICONDUCTOR DEVICES
In some embodiments, an integrated circuit is provided. The integrated circuit may include an inner ring-shaped isolation structure that is disposed in a...
2019/0097012 SEMICONDUCTOR DEVICE WITH LOW RESISTIVITY CONTACT STRUCTURE AND METHOD FOR FORMING THE SAME
A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate including a conductive region made...
2019/0097011 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate, a first device with a horizontal-gate-all-around configuration, and a second device with a ...
2019/0097010 GATE ALL AROUND DEVICE AND FABRICATION THEREOF
A device includes a nanowire, a gate dielectric layer and a gate electrode. The nanowire has a sidewall. The gate dielectric layer surrounds the nanowire. The...
2019/0097009 SPLIT GATE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
The present disclosure, in some embodiments, relates to a method of forming a memory cell. The method may be performed by forming a select gate on a side of a...
2019/0097008 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device which simplifies the manufacturing process while decreasing the width of separation between a first MOS transistor area and a second MOS...
2019/0097007 INTEGRATED CIRCUIT DEVICES
An integrated circuit device may include a pair of line structures. Each line structure may include a pair of conductive lines extending over a substrate in a...
2019/0097005 Semiconductor Device Having Termination Trench
A semiconductor device comprises a semiconductor substrate structure comprising a cell region and an edge termination region surrounding the cell region....
2019/0097004 SEMICONDUCTOR DEVICE
To provide a technique for alleviating electric field concentration at an end portion and the vicinity of the end portion of the bottom surface of a trench. In...
2019/0097003 FIELD-EFFECT TRANSISTOR AND METHOD THEREFOR
A transistor includes a trench formed in a semiconductor substrate with the trench having a first sidewall and a second sidewall. A vertical field plate is...
2019/0097002 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The reliability of resistive field plate part-containing semiconductor device is improved. In peripheral region of semiconductor chip, the outer circumference...
2019/0097001 ELECTRODE STRUCTURE FOR FIELD EFFECT TRANSISTOR
A Field Effect Transistor (FET) structure having: a semiconductor; a first electrode structure; a second electrode structure; and a third electrode structure...
2019/0097000 DIRECT FORMATION OF HEXAGONAL BORON NITRIDE ON SILICON BASED DIELECTRICS
A scalable process for fabricating graphene/hexagonal boron nitride (h-BN) heterostructures is disclosed herein. The process includes (BN).sub.XH.sub.y-radical...
2019/0096999 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A silicon carbide semiconductor device has an n.sup.+-type drift layer provided on a front surface of an n.sup.+-type silicon carbide substrate, a first...
2019/0096998 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device includes the steps of forming a metal film (Ni film) over the bottom surface of a contact hole that exposes a...
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