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Patent # Description
2019/0109221 ENCLOSED GATE RUNNER FOR ELIMINATING MILLER TURN-ON
A semiconductor structure is provided, which includes a semiconductor device, a first conductive layer, and a gate runner. The semiconductor device includes an...
2019/0109220 POWER SEMICONDUCTOR DEVICE
In the present application, a power semiconductor device includes a first-conductive-type first base region having a first principal surface and a second...
2019/0109219 Insulated gate bipolar transistor and diode
A semiconductor device includes a semiconductor layer having a first principal surface on one side thereof and a second principal surface on the other side...
2019/0109218 INSULATED GATE BIPOLAR TRANSISTOR
An IGBT is provided comprising at least two first cells (1, 1'), each of which having an n doped source layer (2), a p doped base layer (3), an n doped...
2019/0109217 FETs and Methods of Forming FETs
An embodiment is a method including forming a raised portion of a substrate, forming fins on the raised portion of the substrate, forming an isolation region...
2019/0109216 METHOD FOR MANUFACTURING TRENCH MOSFET
A method of manufacturing a trench MOSFET can include: forming an epitaxial semiconductor layer having a first doping type on a semiconductor substrate;...
2019/0109215 SEMICONDUCTOR DEVICE
A semiconductor device of an embodiment includes a semiconductor layer having a first plane and a second plane, a first semiconductor region of a first...
2019/0109214 VERTICAL TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
A vertical tunnel field effect transistor (VTFET) including a fin structure protruding from a substrate including a source/drain region, an epitaxially-grown...
2019/0109213 SEMICONDUCTOR STRUCTURE
A structure includes a semiconductor substrate, a source epitaxial structure, a drain epitaxial structure, and a gate stack. The source epitaxial structure is...
2019/0109212 VERTICAL FIELD-EFFECT-TRANSISTORS HAVING A SILICON OXIDE LAYER WITH CONTROLLED THICKNESS
A vertical field-effect transistor and a method for fabricating the same. The vertical field-effect transistor includes a substrate and a bottom source/drain...
2019/0109211 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
A semiconductor device includes a first field effect transistor (FET) including a first gate dielectric layer and a first gate electrode. The first gate...
2019/0109210 SEMICONDUCTOR DEVICE
A semiconductor device includes a first III-V compound layer, a second III-V compound layer over the first III-V compound layer, a source contact and a drain...
2019/0109209 METHOD FOR MANUFACTURING ELECTRONIC COMPONENT FOR HETEROJUNCTION PROVIDED WITH BURIED BARRIER LAYER
The invention relates to a process for manufacturing a heterojunction electronic component provided with an embedded barrier layer, the process comprising:...
2019/0109208 ENHANCEMENT-MODE GAN-BASED HEMT DEVICE ON SI SUBSTRATE AND MANUFACTURING METHOD THEREOF
An enhancement-mode GaN-based HEMT device on Si substrate and a manufacturing method thereof. The device includes a Si substrate, an AlN nucleation layer,...
2019/0109207 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating a semiconductor structure is provided in the present invention. The method includes the steps of forming a plurality of fins in a...
2019/0109206 STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE WITH A DUMMY FIN STRUCTURE
Structures and formation methods of a semiconductor device structure are provided. The method includes forming a first fin structure and a second fin structure...
2019/0109205 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device includes: a first insulating film forming step of forming a first insulating film in a transistor having a...
2019/0109204 Gate Stacks for Stack-Fin Channel I/O Devices and Nanowire Channel Core Devices
A method includes providing a substrate; forming a first structure over the substrate, the first structure including a first gate trench and a first channel...
2019/0109203 METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
A method for manufacturing a semiconductor structure includes forming a first dielectric layer on a gate structure and a source drain structure. A recess is...
2019/0109202 METHOD FOR MANUFACTURING GATE STACK STRUCTURE
The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed...
2019/0109201 MOS-VARACTOR DESIGN TO IMPROVE TUNING EFFICIENCY
A gate stack structure for a MOS varactor includes a substrate including a channel region, a high-k dielectric layer on the channel region of the substrate, a...
2019/0109200 RADIOFREQUENCY SWITCH DEVICE AND MANUFACTURING METHOD THEREOF
A radiofrequency switch device includes an insulation layer, a semiconductor layer, a gate structure, a first doped region, a second doped region, an epitaxial...
2019/0109199 OXIDE SEMICONDUCTOR DEVICE
An oxide semiconductor device includes an oxide semiconductor channel layer, a first gate dielectric layer, a first gate electrode, a source electrode, and a...
2019/0109198 SEMICONDUCTOR STRUCTURE WITH ENLARGED GATE ELECTRODE STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate stack structure formed over a substrate....
2019/0109197 SCALED MEMORY STRUCTURES OR OTHER LOGIC DEVICES WITH MIDDLE OF THE LINE CUTS
The present disclosure relates to semiconductor structures and, more particularly, to scaled memory structures with middle of the line cuts and methods of...
2019/0109196 SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device includes a plurality of electrodes, extending in a first direction and a second direction orthogonal...
2019/0109195 TRANSISTOR WITH SOURCE FIELD PLATES UNDER GATE RUNNER LAYERS
A transistor device includes a field plate extending from a source contact layer and defining an opening above a gate metal layer. Coplanar with the source...
2019/0109194 EPITAXIAL GROWTH METHODS AND STRUCTURES THEREOF
A method and structure for providing a two-step defect reduction bake, followed by a high-temperature epitaxial layer growth. In various embodiments, a...
2019/0109193 Fin-Based Strap Cell Structure
Fin-based well straps are disclosed herein for improving performance of memory arrays, such as static random access memory arrays. An exemplary integrated...
2019/0109192 TRANSISTOR ELEMENT WITH REDUCED LATERAL ELECTRICAL FIELD
In sophisticated semiconductor devices, the lateral electric field in fully depleted transistor elements operated at elevated supply voltages may be...
2019/0109191 NANOSHEET SEMICONDUCTOR STRUCTURE WITH INNER SPACER FORMED BY OXIDATION
A method for fabricating a semiconductor structure includes forming a nanosheet stack on a base. The nanosheet stack comprises one or more first nanosheet...
2019/0109190 MEMORY DEVICE INCLUDING VOIDS BETWEEN CONTROL GATES
Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a channel to conduct current, the channel...
2019/0109189 HIGH VOLTAGE RESISTOR DEVICE
The present disclosure, in some embodiments, relates to a high voltage resistor device. The device includes a buried well region disposed within a substrate...
2019/0109188 POWER SEMICONDUCTOR DEVICE HAVING FULLY DEPLETED CHANNEL REGIONS
A power semiconductor device is disclosed. The device includes a semiconductor body coupled to a first load terminal structure and a second load terminal...
2019/0109187 SEMICONDUCTOR SWITCHING ELEMENT
A switching element including: a bottom insulating layer disposed at a bottom of a trench; a side surface insulating film covering a side surface of the...
2019/0109186 Damascene Thin-Film Resistor (TFR) In Poly-Metal Dielectric and Method of Fabrication
A damascene thin-film resistor (TFR), e.g., a damascene thin-film resistor module formed within a poly-metal dielectric (PMD) layer using a single added mask...
2019/0109184 DISPLAY PANEL AND DISPLAY DEVICE
A display panel includes a display area, and the display area is disposed with a plurality of data lines extending along a first direction. The display area...
2019/0109183 DISPLAY DEVICE, METHOD FOR DRIVING THE SAME, AND ELECTRONIC APPARATUS
A display device including a pixel array unit having a matrix of pixels each configured such that an anode electrode of an organic electroluminescent element...
2019/0109182 DISPLAY MODULE
Organic EL display module including a pixel disposed in respective intersections between a plurality of scanning lines and a plurality of data lines, which...
2019/0109181 DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME
A display device includes a substrate in which a first area, a second area and a bending area between the first and second areas are defined, a plurality of...
2019/0109180 DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF, REPAIRING METHOD FOR DISPLAY APPARATUS
A display apparatus is provided, which includes a rigid substrate; a first carrier plate provided on a first surface of the rigid substrate; a first substrate...
2019/0109179 Solid State Tissue Equivalent Detector With Gate Electrodes
An organic semiconductor detector for detecting radiation has an organic conducting active region, an output electrode and a field effect semiconductor device....
2019/0109178 RRAM MEMORY CELL WITH MULTIPLE FILAMENTS
In some embodiments, the present disclosure relates to a method of forming a memory circuit. The method may be performed by forming an interconnect wire within...
2019/0109177 STEEP-SWITCH VERTICAL FIELD EFFECT TRANSISTOR
Embodiments of the invention are directed to a method and resulting structures for a steep-switch vertical field effect transistor (SS-VFET). In a non-limiting...
2019/0109176 MEMORY CELL WITH INDEPENDENTLY-SIZED ELEMENTS
Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in...
2019/0109175 Semiconductor Devices Including Data Storage Patterns
A semiconductor device is provided including a base insulating layer on a substrate; a first conductive line that extends in a first direction on the base...
2019/0109174 MANUFACTURING METHOD OF LED DISPLAY DEVICE
The disclosure provides a manufacturing method of an LED display device, including the following steps: providing a substrate; forming at least one first...
2019/0109173 METHOD OF PROCESSING WAFER
A method of processing a wafer having devices disposed in respective regions demarcated on a front face thereof by a grid of a plurality of projected dicing...
2019/0109172 DETECTING DEVICE
A detecting device is provided. The detecting device includes a substrate, at least one transistor, at least one detecting element, and a scintillator layer....
2019/0109171 SOLID-STATE IMAGING ELEMENT AND ELECTRONIC DEVICE
An imaging device and an electronic apparatus including an imaging device are provided. The imaging device includes a substrate and a photoelectric conversion...
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