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Patent # Description
2019/0109170 Complementary Metal-Oxide-Semiconductor Image Sensors
A CMOS image sensor includes a substrate and at least one device isolation region in the substrate and defining first and second pixel regions and first and...
2019/0109169 SOURCE FOLLOWER CONTACT
An image sensor includes a photodiode disposed in a first semiconductor material to absorb photons incident on the image sensor and generate image charge. A...
2019/0109168 CIRCUIT BOARD, SEMICONDUCTOR DEVICE, IMAGING DEVICE, SOLID-STATE IMAGE SENSOR, METHOD FOR MANUFACTURING...
The present disclosure relates to a circuit board, a semiconductor device, an imaging device, a solid-state image sensor, a method for manufacturing a...
2019/0109167 LIGHT DETECTION DEVICE
A light detection device includes: a back-illuminated light receiving element; a circuit element; a connection member; an underfill; and a light shielding...
2019/0109166 CAMERA
A camera comprising: a sensor holder, an image sensor mounted on the sensor holder, a mount holder, and a lens mount being adapted to receive a lens array and...
2019/0109165 SOLID-STATE IMAGE SENSOR, ELECTRONIC APPARATUS, AND IMAGING METHOD
The present disclosure relates to a solid-state image sensor, an electronic apparatus and an imaging method by which specific processing other than normal...
2019/0109164 METHOD FOR MANUFACTURING IMAGE SENSOR
Methods for forming an image sensor structure are provided. The method includes forming a light-sensing region in a substrate and forming a storage node...
2019/0109163 Image Sensors with Grounded or Otherwise Biased Channel-Stop Contacts
A back-illuminated image sensor includes a first pixel, a second pixel, and a channel stop situated between the first pixel and the second pixel to isolate the...
2019/0109162 IMAGE SENSOR DEVICE AND METHOD OF FABRICATING THE SAME
An image sensor device is disclosed. The image sensor device includes: a substrate having a front surface and a back surface; a radiation-sensing region formed...
2019/0109161 COLOR FILTER FOR IMAGE SENSOR, IMAGE SENSOR, AND METHOD OF MANUFACTURING COLOR FILTER FOR IMAGE SENSOR
Provided are: a color filter for an image sensor in which an infrared filter having no particulate defects or the like can be laminated adjacent to an image...
2019/0109160 ARRAY SUBSTRATE AND DISPLAY DEVICE AND METHOD FOR MAKING THE ARRAY SUBSTRATE
An array substrate includes a substrate, a first TFT, a second TFT, and a third TFT. The first TFT includes a first channel layer on the substrate, a first...
2019/0109159 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A semiconductor device (100A) is provided with: a gate electrode (3); an oxide semiconductor layer (5); a thin-film transistor (101) including a gate...
2019/0109158 THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE
In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is...
2019/0109157 DISPLAY DEVICE
To provide a display device including a flexible panel that can be handled without seriously damaging a driver circuit or a connecting portion between...
2019/0109156 DISPLAY APPARATUS
A display apparatus is provided that includes a substrate having a display area and a peripheral area located outside the display area. A first part of an edge...
2019/0109155 ARRAY SUBSTRATE, METHOD OF PRODUCING THE SAME, AND DISPLAY PANEL
An array substrate including a spin-on glass layer formed of spin-on glass material, a first line disposed on a lower side with respect to the spin-on glass...
2019/0109154 PANEL DEVICE AND ELECTRONIC DEVICE
A panel device includes a substrate, a common electrode, and an electrostatic protection component. The substrate includes an active area and a peripheral...
2019/0109153 ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, DISPLAY APPARATUS
The present disclosure provides an array substrate and a method for manufacturing the same, a display apparatus. The array substrate includes a base substrate...
2019/0109152 BODY CURRENT BYPASS RESISTOR
A radio frequency integrated circuit (RFIC) is described. The RFIC includes a switch field effect transistor (FET), including a source region, a drain region,...
2019/0109151 INTEGRATED CIRCUIT INCLUDING COMPLEX LOGIC CELL
An integrated circuit includes a complex logic cell. The complex logic cell includes a first logic circuit providing a first output signal from a first input...
2019/0109150 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
According to an embodiment, a semiconductor memory device comprises: a stacked body that includes a plurality of control gate electrodes stacked above a...
2019/0109149 VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING VERTICAL MEMORY DEVICES
A vertical memory device and a method of manufacturing the same, the device including a cell array including cell regions spaced apart from each other in a...
2019/0109148 SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor layer having a main surface, a gate insulating film including a thin film portion forming a tunnel window, a...
2019/0109147 METHOD OF FABRICATING SEMICONDUCTOR STRUCTURE
The present disclosure provides a method of fabricating a semiconductor structure, and the method includes following steps. A gate structure is formed on a...
2019/0109146 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING
The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first gate disposed over a substrate and having a...
2019/0109145 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
A non-volatile memory (NVM) cell includes a semiconductor wire including a select gate portion and a control gate portion. The NVM cell includes a select...
2019/0109144 SRAM Cells with Vertical Gate-All-Round MOSFETS
A Static Random Access Memory (SRAM) cell includes a first and a second pull-up transistor, a first and a second pull-down transistor forming cross-latched...
2019/0109143 SRAM LAYOUT FOR DOUBLE PATTERNING
An integrated circuit with a SAR SRAM cell with power routed in metal-1. An integrated circuit with a SAR SRAM cell that has power routed in Metal-1 and has...
2019/0109142 Using Three or More Masks to Define Contact-Line-Blocking Components in FinFET SRAM Fabrication
A plurality of gate stacks is formed over a substrate. The gate stacks are surrounded by a dielectric structure. A plurality of contact-line-blocking patterns...
2019/0109141 Flexible Merge Scheme for Source/Drain Epitaxy Regions
A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a...
2019/0109140 METHOD FOR PRODUCING PILLAR-SHAPED SEMICONDUCTOR DEVICE
A method for producing a pillar-shaped semiconductor device includes steps of forming, on the side surface of an N.sup.+ layer (38b) of the top portion of a Si...
2019/0109139 METHOD OF FABRICATING DRAM
A method of fabricating a DRAM includes providing a substrate. Later, a first mask layer is formed to cover the substrate. The first mask layer includes a...
2019/0109138 METHOD OF FORMING SEMICONDUCTOR DEVICE
A semiconductor device and method of forming the same, the semiconductor device includes bit lines, a transistor, a dielectric layer, plugs and a capping...
2019/0109137 INTEGRATED CIRCUIT DEVICES AND METHODS OF FABRICATING SUCH DEVICES
An integrated circuit device includes: a plurality of channel regions spaced apart from each other in an active region; a plurality of source/drain regions; an...
2019/0109136 Hybrid Scheme for Improved Performance for P-type and N-type FinFETs
A method includes etching a hybrid substrate to form a recess extending into the hybrid substrate. The hybrid substrate includes a first semiconductor layer...
2019/0109135 SEMICONDUCTOR DEVICES WITH NANOWIRES AND METHODS FOR FABRICATING THE SAME
A semiconductor device may include a substrate, a first nanowire, a second nanowire, a first gate insulating layer, a second gate insulating layer, a first...
2019/0109134 Replacement Gate Process for FinFET
A method of forming a semiconductor device includes etching a substrate to form two first trenches separated by a fin; filling the two first trenches with an...
2019/0109133 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A STANDARD CELL WHICH INCLUDES A FIN
Disclosed herein is a semiconductor integrated circuit device including a standard cell with a fin extending in a first direction. The fin and a gate line...
2019/0109132 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a gate stack, a first doped region, a second...
2019/0109131 SEMICONDUCTOR DEVICE
An accumulation layer has a function of reducing an ON voltage (Von), which is a voltage between the collector and the emitter when turning on the IGBT, by...
2019/0109130 SEMICONDUCTOR CIRCUIT AND SEMICONDUCTOR DEVICE
An object is to provide a technique for enhancing the breakdown voltage of a semiconductor device. A semiconductor circuit includes a first resistor, a second...
2019/0109129 ESD HARD BACKEND STRUCTURES IN NANOMETER DIMENSION
Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is...
2019/0109128 SERIES CONNECTED ESD PROTECTION CIRCUIT
An electrostatic discharge (ESD) protection circuit (FIG. 2A) for an integrated circuit is disclosed. The circuit is formed on a substrate (P-EPI) having a...
2019/0109127 SELF-BIASED BIDIRECTIONAL ESD PROTECTION CIRCUIT
Disclosed examples provide an ESD protection circuit including a protection structure to selectively conduct current between a first terminal at a protected...
2019/0109126 Metal Gate Structure Cutting Process
Methods for cutting (e.g., dividing) metal gate structures in semiconductor device structures are provided. A dual layer structure can form sub-metal gate...
2019/0109125 SEAL RING STRUCTURES AND METHODS OF FORMING SAME
Some embodiments relate to a three-dimensional (3D) integrated circuit (IC). The 3D IC includes a first IC die comprising a first semiconductor substrate, and...
2019/0109124 LIGHT EMITTING DEVICE AND METHOD OF FORMING THE SAME
A method of forming a light emitting device is provided. A carrier with a plurality of buffer pads and a plurality of light emitting diode chips is provided,...
2019/0109123 SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor structure is disclosed. The semiconductor structure includes: a semiconductor substrate including a front surface and a back surface; a...
2019/0109122 ELECTRONIC PACKAGES WITH STACKED SITFFENERS AND METHODS OF ASSEMBLING SAME
A semiconductor package apparatus includes a passive device that is embedded in a bottom package stiffener, and a top stiffener is stacked above the bottom...
2019/0109121 SEAL-RING STRUCTURE FOR STACKING INTEGRATED CIRCUITS
A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first...
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