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Patent # Description
2019/0221491 ELECTRICAL CONNECTOR EQUIPPED WITH CLIP
An electrical connector includes an insulative housing retaining a plurality of contacts therein and surrounded by a metallic seat. A clip includes a frame...
2019/0221490 ELECTRONIC DEVICE
An electronic device includes an electronic component (12), a sealing resin body (11) sealing the electronic component, and a plurality of conductive members...
2019/0221489 INSULATING SUBSTRATE AND SEMICONDUCTOR DEVICE USING SAME
In order to address the problem in that, by increasing the gate resistance of a power semiconductor element, while variation of switching time can be...
2019/0221488 MODULE INSTALLATION ON PRINTED CIRCUIT BOARDS WITH EMBEDDED TRACE TECHNOLOGY
Embodiments are generally directed to module installation on printed circuit boards with embedded trace technology. An embodiment of a printed circuit board...
2019/0221487 SEMICONDUCTOR DEVICE
A semiconductor device having a conductive pad is provided, wherein the conductive pad includes a substrate, a dielectric layer, a plurality of vias, and a...
2019/0221486 INSPECTION SYSTEM AND INSPECTION METHOD
An inspection system includes a laser light source, an optical system for laser marking that irradiates a semiconductor device with laser light from a metal...
2019/0221485 TEST CONDITION DETERMINING APPARATUS AND TEST CONDITION DETERMINING METHOD
The object is to provide a technique for enabling determination of an appropriate test condition. A test condition determining apparatus includes a map...
2019/0221484 THREE-DIMENSIONAL STACKED VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR LOGIC GATE WITH BURIED POWER BUS
Techniques facilitating three-dimensional stacked vertical transport field effect transistor logic gates with buried power bus are provided. A logic device can...
2019/0221483 SINGLE WORK FUNCTION ENABLEMENT FOR SILICON NANOWIRE DEVICE
A method of forming nanosheet and nanowire transistors includes the formation of alternating epitaxial layers of silicon germanium (SiGe) and silicon (Si). The...
2019/0221482 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor substrate, an isolation structure, and a spacer. The semiconductor substrate includes at least one fin...
2019/0221481 Methods for Splitting Semiconductor Devices and Semiconductor Device
A method for splitting a semiconductor wafer includes incorporating hydrogen atoms into at least a splitting region of a semiconductor wafer. The splitting...
2019/0221480 METHOD OF PROCESSING A WAFER
The invention relates to methods of processing a wafer, having on one side a device area with a plurality of devices. In particular, the invention relates to a...
2019/0221479 MANUFACTURING PROCESS OF ELEMENT CHIP
A manufacturing process of an element chip comprises steps of preparing a substrate including dicing regions and element regions, attaching a holding sheet...
2019/0221478 DECOUPLED VIA FILL
Techniques are disclosed for providing a decoupled via fill. Given a via trench, a first barrier layer is conformally deposited onto the bottom and sidewalls...
2019/0221477 LOW-RESISTIVITY METALLIC INTERCONNECT STRUCTURES WITH SELF-FORMING DIFFUSION BARRIER LAYERS
Methods for fabricating low-resistivity metallic interconnect structures with self-forming diffusion barrier layers are provided, as well as semiconductor...
2019/0221476 ELEMENT ISOLATION LAYER STRUCTURE AND METHOD OF MANUFACTURING THE SAME
An element isolation structure includes a substrate defining a trench including an upper trench and a lower trench in communication with each other, the...
2019/0221475 SEMICONDUCTOR DEVICE
A semiconductor device includes an interlayer insulation layer on a semiconductor substrate, a via plug and a wiring line on the via plug, in the interlayer...
2019/0221474 MERGE MANDREL FEATURES
The present disclosure relates to semiconductor structures and, more particularly, to merged mandrel lines and methods of manufacture. The structure includes:...
2019/0221473 SKIP VIA STRUCTURES
The present disclosure relates to semiconductor structures and, more particularly, to skip via structures and methods of manufacture. The structure includes: a...
2019/0221472 DEVICES AND METHODS OF FORMING THEREOF BY POST SINGLE LAYER TRANSFER FABRICATION OF DEVICE ISOLATION STRUCTURES
Semiconductor devices and methods of forming thereof by post layer transfer fabrication of device isolation structures are described. A substrate with first...
2019/0221471 METHOD FOR TRANSFERRING A USEFUL LAYER
A useful layer is layered onto a support by a method that includes the steps of forming an embrittlement plane by implanting light elements into a first...
2019/0221470 METHOD FOR MANUFACTURING BONDED SOI WAFER
Method for manufacturing bonded SOI wafer by bonding bond wafer and base wafer each composed of silicon single crystal with insulator film being interposed...
2019/0221469 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a single diffusion...
2019/0221468 Substrate Processing Apparatus
Described herein is a technique capable of adjusting a plasma distribution of a processing region. According to one aspect of the technique of the present...
2019/0221467 APPARATUS FOR FIXING OBJECTS BY MEANS OF VACUUM
A device for fixing different-sized base area objects with a vacuum including on a table: first, second, and third vacuum chambers. The third chamber extending...
2019/0221466 TRANSFER METHOD, MOUNTING METHOD, TRANSFER DEVICE, AND MOUNTING DEVICE
A transfer method for transferring LED chips, a first surface of which is held on a transfer substrate, on a transfer-target substrate is provided that...
2019/0221465 Method of Forming a Chip Arrangement, Chip Arrangement, Method of Forming a Chip Package, and Chip Package
A method of forming a chip arrangement is provided. The method includes: arranging a plurality of stacks on a carrier, each stack including a thinned...
2019/0221464 ELECTROSTATIC CHUCKING METHOD AND SUBSTRATE PROCESSING APPARATUS
An electrostatic chucking method uses a substrate processing apparatus including an electrostatic chuck, a focus ring, a supply unit configured to supply a...
2019/0221462 Substrate Breakage Detection in a Thermal Processing System
Apparatus, systems, and processes for substrate breakage detection in a thermal processing system are provided. In one example implementation, a process can...
2019/0221461 PATTERN FORMING APPARATUS AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
A pattern forming apparatus according to an embodiment includes: a pre-alignment unit that performs pre-alignment for a substrate; a transfer unit that...
2019/0221460 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A technique is described that provides efficient production management of a substrate processing system that includes a substrate processing apparatus and a...
2019/0221459 ENHANCED SELENIUM SUPPLY IN COPPER INDIUM GALLIUM SELENIDE PROCESSES
A substrate carrier, includes: a unitary body fabricated from a single block of graphite, wherein the body comprises a back plate, and a pair of spaced apart,...
2019/0221458 ADVANCED TEMPERATURE MONITORING SYSTEM AND METHODS FOR SEMICONDUCTOR MANUFACTURE PRODUCTIVITY
Embodiments herein provide methods of monitoring temperatures of fluid delivery conduits for delivering fluids to, and other components external to, a...
2019/0221457 SUBSTRATE TREATING APPARATUS
A substrate treating method for treating substrates with a substrate treating apparatus having an indexer section, a treating section and an interface section...
2019/0221456 SELECTIVE AND MULTILEVEL SOLDER PASTE PIN TRANSFER
Embodiments include a paste transfer tool (PTT), a semiconductor package, and a method of forming the semiconductor package with the paste transfer tool. The...
2019/0221455 APPARATUS FOR TREATING SUBSTRATE
An apparatus for treating a substrate are provided. The apparatus includes a chamber having a treatment space therein, a substrate support unit to support the...
2019/0221454 DEGASSING CHAMBER AND SEMICONDUCTOR PROCESSING APPARATUS
A degassing chamber and a semiconductor processing apparatus are provided. The degassing chamber includes a chamber; a substrate container, movable within the...
2019/0221453 SUBSTRATE PROCESSING APPARATUS
There is provided a substrate processing apparatus including: a transfer region communicating with a process chamber where substrates are processed; a first...
2019/0221452 PROCESSING APPARATUS
According to one embodiment, a processing apparatus for processing substrates having different base shapes includes a stage comprising a first portion having a...
2019/0221451 SUBSTRATE SUPPORT DEVICE AND SUBSTRATE CLEANING DEVICE INCLUDING THE SAME
A support device for a substrate and a substrate cleaning apparatus, the support device including a support on which the substrate is loadable; a rotor that...
2019/0221450 SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS
One of a setting dissolved oxygen concentration and a setting atmosphere oxygen concentration is determined based on a required etching amount. Thereafter,...
2019/0221449 Semiconductor Module and Method for Producing the Same
A method for producing a power semiconductor module arrangement includes forming a pre-layer by depositing inorganic filler on a first surface within a...
2019/0221448 REDISTRIBUTION SYSTEM WITH DENSE PITCH AND COMPLEX CIRCUIT STRUCTURES IN MULTI-LAYERED HOMOGENEOUS STRUCTURE...
An embodiment of the present invention provides a method and system of manufacturing a redistribution platform comprising: providing a substrate; patterning a...
2019/0221447 HIGH DENSITY ORGANIC INTERCONNECT STRUCTURES
Generally discussed herein are systems, devices, and methods that include an organic high density interconnect structure and techniques for making the same....
2019/0221446 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor package structure includes a first insulating layer, a first conductive layer, a multi-layered circuit structure, a protection layer, and a...
2019/0221445 3D Packages and Methods for Forming the Same
Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a semiconductor device...
2019/0221444 PRINTED CIRCUIT BOARD WITH PROTECTIVE MEMBER AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE HAVING THE SAME
A method of manufacturing a semiconductor package includes providing a substrate main body to which external connection terminals are attached, attaching a...
2019/0221443 CONDUCTING WIRE PROCESS ARRAY ETCHING METHOD
The present application discloses a conducting wire process array etching method. The method includes the steps of etching a multilayer metal film with metal...
2019/0221442 Pre-Heat Processes for Millisecond Anneal System
Preheat processes for a millisecond anneal system are provided. In one example implementation, a heat treatment process can include receiving a substrate on a...
2019/0221441 METHODS FOR ETCHING A HARDMASK LAYER
Methods for etching a hardmask layer to transfer features into a material layer using an etch process are provided. The methods described herein advantageously...
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