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Patent # Description
US-9,946,669 Method of and circuitry for controlling access by a master to a peripheral, a method of configuring such...
A method of controlling access by a master to a peripheral includes receiving an interrupt priority level from an interrupt controller associated with the...
US-9,946,668 Automatic prioritization of interrupts in a modeling environment
In one embodiment, a method of implementing interrupt prioritization and preemption in a modeling environment is provided. The method may include obtaining a...
US-9,946,667 Microcontroller with configurable logic array
A microcontroller may have a central processing unit (CPU); a programmable logic device receiving input signals and having input/outputs coupled with external...
US-9,946,666 Coalescing texture access and load/store operations
A system, method, and computer program product are provided for coalescing memory access requests. A plurality of memory access requests is received in a thread...
US-9,946,665 Fetch less instruction processing (FLIP) computer architecture for central processing units (CPU)
Fetch Less Instruction Processing (FLIP) Computer Architecture for Central Processing Units (CPU). This embodiment relates to computing systems, and more...
US-9,946,664 Socket interposer having a multi-modal I/O interface
Exemplary embodiments include a socket interposer having a plurality of connectors configured to attach to a server board, the server board including: a first...
US-9,946,663 HDMI extender with bidirectional power over twisted pair
Disclosed are various embodiments of transmit and receive connectivity devices that include signal processing circuitry, an HDMI port, and a multi-position...
US-9,946,662 Double-mix Feistel network for key generation or encryption
A method of providing security in a computer system includes dividing a block of data into initial left and right halves, and calculating updated left and right...
US-9,946,661 Command executing method, memory controller and memory storage apparatus
A command executing method for a memory storage apparatus is provided. The method includes grouping logical addresses into logical address groups and assigning...
US-9,946,660 Memory space management
Examples include a device for memory space management. Some examples include receiving, from a host, a space management request that identifies a virtual page...
US-9,946,659 Near-memory accelerator for offloading pointer chasing operations from a processing element
Embodiments include a near-memory acceleration method for offloading data traversal operations from a processing element. The method is implemented at a...
US-9,946,658 Memory interface design having controllable internal and external interfaces for bypassing defective memory
An improved memory interface design is provided. In some implementations, an integrated circuit includes a first cache memory unit, a second cache memory unit...
US-9,946,657 Spilling small cache entries to a solid state device
Systems for managing a multi-level cache in high-performance computing. A method is practiced over a multi-tier caching subsystem that comprises a first cache...
US-9,946,656 Completion packet return based on eviction or flush
A completion packet may be returned before a data packet is written to a memory, if a field of the data packet indicates the data packet was sent due to a cache...
US-9,946,655 Storage system and storage control method
In a storage system, first and second controllers have respective first and second buffer and cache areas. The first controller stores write data in accordance...
US-9,946,654 High-bandwidth prefetcher for high-bandwidth memory
A method for prefetching data into a cache is provided. The method allocates an outstanding request buffer ("ORB"). The method stores in an address field of the...
US-9,946,653 Predictive memory caching
Metadata history is collected for operations performed by an application as directed by a user. In a subsequent interaction by the user with the application,...
US-9,946,652 Pre-fetch in a multi-stage memory management system
A memory management system for managing a memory and includes a multi-stage memory management unit including control circuitry and cache memory. The cache...
US-9,946,651 Pattern detector for detecting hangs
A microprocessor comprises a cache including a tag array; a tag pipeline that arbitrates access to the tag array; and a pattern detector. The pattern detector...
US-9,946,650 Technique to share information among different cache coherency domains
A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches...
US-9,946,649 Data coherency system and method
A method, computer program product, and computing system for defining an IO splitter module within each of a plurality of nodes included within a ...
US-9,946,648 Cache coherency protocol-based prefetching methods and systems
A method includes linking together a set of cache lines, tracking historical changes to the cache coherency protocol states of the set of cache lines, and...
US-9,946,647 Directory coherence for multicore processors
A cache coherence mechanism may comprise a bit-to-cache map for processor cores operable up to a maximum frequency for cores of a multicore processor. Entries...
US-9,946,646 Systems and method for delayed cache utilization
A system for managing cache utilization includes a processor core, a lower-level cache, and a higher-level cache. In response to activating the higher-level...
US-9,946,645 Information processing apparatus and memory control method
An information processing apparatus comprises a plurality of processor elements, and a memory having a plurality of banks. Statistical information representing...
US-9,946,644 Memory system and operating method thereof
A memory system may include a memory device including a plurality of a super blocks, a list, and a controller suitable for updating the list with block...
US-9,946,643 Memory system and method for controlling nonvolatile memory
According to one embodiment, a memory system includes a nonvolatile memory including a plurality of blocks and a controller. The controller manages a garbage...
US-9,946,642 Distributed multimode storage management
In one embodiment, a distributed storage system comprises: a plurality of appliances, a distributed multimode storage management coordinator, and a ...
US-9,946,641 Memory management model and interface for new applications
A memory management system is described herein that receives information from applications describing how memory is being used and that allows an application...
US-9,946,640 Method and apparatus for securing sufficient memory in a device
A method of managing a memory of a device is provided. The method includes acquiring amount of memory use information of the device, estimating a memory use...
US-9,946,639 Transactional boundaries for virtualization within a software system
Transaction data is received identifying characteristics of a particular transaction involving the first software component and a second software component as...
US-9,946,638 System and method for end to end performance response time measurement based on graphic recognition
Software testing techniques based on image recognition are disclosed. In various embodiments, a programmatically implemented image classifier is trained to...
US-9,946,637 Automatic updating of graphical user interface element locators based on dimension comparison
An automated testing system is described for efficient testing of software applications. Locators are used by the test to find user interface elements in an...
US-9,946,636 Companion testing for body-aware devices
One embodiment provides a method, including: receiving movement data describing physical movement of a person performing a predetermined action; generating,...
US-9,946,635 Synchronizing multi-system program instruction sequences
A method comprises receiving a list of steps with a step associated with a first work unit and a step associated with a second work unit, the first work unit is...
US-9,946,634 System and method for determining test coverage
A computer-implemented method, computer program product, and system is provided for determining test coverage. In an implementation, a method may include...
US-9,946,633 Assessing risk of software commits to prioritize verification resources
A computer-implemented method and system for assessing risk of a software program and software updates to a program to prioritize verification resources, which...
US-9,946,632 Self-service customer escalation infrastructure model
A service request from a customer is received at a first computer system. The service request concerns an issue with an application that is installed in a...
US-9,946,631 Debug management in a distributed batch data processing environment
Disclosed aspects relate to debug management in a distributed batch data processing environment which uses a shared pool of configurable computing resources. A...
US-9,946,630 Efficiently debugging software code
A mechanism is provided for efficiently debugging software code. A set of modified log files associated with the software code is presented to a software...
US-9,946,629 System, method and apparatus for deriving root cause for software test failure
For a program of interest represented as a sequence of states comprising variables and flags wherein controls transition the program from state to state, and...
US-9,946,628 Embedding and executing trace functions in code to gather trace data
Provided are a computer program product, system, and method for embedding and executing trace functions in code to gather trace data. A plurality of trace...
US-9,946,627 Managing logger source code segments
A computer-implemented method includes identifying a primary code segment, determining a confidence score associated with said primary code segment, and...
US-9,946,626 Method and system for measuring a runtime by means of watchpoints
A runtime of a computer program may be measured by providing the compiled computer program with at least a first watchpoint and a second watchpoint at...
US-9,946,625 Diagnostic tool and method for efficient software development
Disclosed is a computer-implemented software development diagnostic tool for improving the efficiency of software development. The computer-implemented software...
US-9,946,624 Systems and methods to capture data signals from a dynamic circuit
A system for tracing an operation of an electronic circuit is provided. The system includes an electronic circuit, a trace buffer, and a trigger detection...
US-9,946,623 Benchmark updating method and system for touch detection terminal capable of eliminating large-area interference
The present invention is applicable to the technical field of touch control, and provides a benchmark updating method for a touch detection terminal under...
US-9,946,622 Mobile device application monitoring software
A software application for monitoring the performance of other software applications on mobile devices using efficient crowd sourced data and recommending third...
US-9,946,621 Prevention of event flooding
Techniques for preventing event flooding in an event processing system, comprising: responsive to receiving, by an analysis component, monitored activity data,...
US-9,946,620 Memory built-in self test system
A memory built-in self test ("BIST") system comprises: a controller; a single port memory engine coupled to one or more single port memories; and a non-single...
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