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Patent # Description
US-9,966,497 Method of fabricating nonpolar gallium nitride-based semiconductor layer, nonpolar semiconductor device, and...
A method of fabricating a nonpolar gallium nitride-based semiconductor layer is provided. The method is a method of fabricating a nonpolar gallium nitride layer...
US-9,966,496 Light emitting heterostructure with partially relaxed semiconductor layer
A light emitting heterostructure including a partially relaxed semiconductor layer is provided. The partially relaxed semiconductor layer can be included as a...
US-9,966,495 Transparent conductive layer and transparent electrode comprising the same
Disclosed are a transparent conductive layer and a transparent electrode comprising the same, and in particular, a zinc oxide-based transparent conductive layer...
US-9,966,494 Method for manufacturing a polycrystalline silicon ingot
A method for manufacturing a polycrystalline silicon ingot includes steps of: a) melting a silicon material in a container disposed in a thermal field to form a...
US-9,966,493 Opto-electronic modules and methods of manufacturing the same and appliances and devices comprising the same
Manufacturing opto-electronic modules (1) includes providing a substrate wafer (PW) on which detecting members (D) are arranged; providing a spacer wafer (SW);...
US-9,966,492 PIN photodiode, X-ray detecting pixel, X-ray detecting apparatus and detecting method thereof
The present application provides a PIN photodiode, an X-ray detecting pixel, an X-ray detecting apparatus and a detecting method thereof. The PIN photodiode may...
US-9,966,491 Optically switched graphene/4H-SiC junction bipolar transistor
A bi-polar device is provided, along with methods of making the same. The bi-polar device can include a semiconductor substrate doped with a first dopant, a...
US-9,966,490 Ultraviolet sensor and method of manufacturing the same
An ultraviolet sensor comprises a glass substrate, a semiconductor structure, an electrode layer and a thin film metallic glass. The semiconductor structure...
US-9,966,489 Overheat protection device, overheat protection method and electrical device
The present disclosure provides an overheat protection device, an overheat protection method and an electrical device. The overheat protection device is used in...
US-9,966,488 Optical film with quantum dots embedded in nano patterns, a preparation method thereof and solar cell...
By virtue of a structure in which patterns have protuberances with a cone-shaped structure and quantum dots are embedded in the protuberances, an optical film...
US-9,966,487 Strain relief apparatus for solar modules
A photovoltaic module can be constructed from one or more strings, with each of the strings being constructed from a plurality of cascaded solar cells. A...
US-9,966,486 Solar cell apparatus and method of fabricating the same
Disclosed are a solar cell apparatus and a method of fabricating the same. The solar cell apparatus includes a substrate, a first electrode layer on the...
US-9,966,485 Solar cell and method of fabricating the same
Disclosed are a solar cell and a method of fabricating the same. The solar cell includes a first back electrode layer on a support substrate; a second back...
US-9,966,484 Process for preparing passivated emitter rear contact (PERC) solar cells
A process for preparing a passivated emitter rear contact solar cell, which includes the steps as follows: removing the damaged layer on the surface of the...
US-9,966,483 Semiconductor nanowire antenna solar cells and detectors
Patterning planar photo-absorbing materials into arrays of nanowires is demonstrated as a method for increasing the total photon absorption in a given thickness...
US-9,966,482 Solar cell module and preparing method of the same
A solar cell module according to the embodiment includes a back electrode layer formed on a top surface of a support substrate and including a first groove; a...
US-9,966,481 Shielded electrical contact and doping through a passivating dielectric layer in a high-efficiency crystalline...
Solar cell structures and formation methods which utilize the surface texture in conjunction with a passivating dielectric layer to provide a practical and...
US-9,966,480 Electrode composition, electrode manufactured using the same, and solar cell
An electrode composition, including a conductive powder; a glass frit; and an organic vehicle including an organic binder, a multi-functional (meth)acrylate...
US-9,966,479 Aluminum-tin paste and its use in manufacturing solderable electrical conductors
The present invention is directed to a paste composition comprising Al and Sn dispersed in an organic medium and to paste compositions that provide a solderable...
US-9,966,478 Method for plating a photovoltaic cell and photovoltaic cell obtained by said method
A method for producing at least one electric contact by electrochemical deposition of an electrically conducting material on a face of a photovoltaic cell, the...
US-9,966,477 Charge trapping split gate device and method of fabricating same
Embodiments provide a split gate device, methods for fabricating a split gate device, and integrated methods for fabricating a split gate device and a periphery...
US-9,966,476 Semiconductor memory device having first and second floating gates of different polarity
A semiconductor memory device includes a first floating gate and a second floating gate of conductivity types with different polarities. Injection of electrons...
US-9,966,475 Semiconductor device
A highly reliable semiconductor device the yield of which can be prevented from decreasing due to electrostatic discharge damage is provided. A semiconductor...
US-9,966,474 Thin film transistor having oxide semiconductor layer
Oxide layers which contain at least one metal element that is the same as that contained in an oxide semiconductor layer including a channel are formed in...
US-9,966,472 Electronic device, stacked structure, and manufacturing method of the same
A stacked structure includes: an insulating substrate; a graphene film that is formed on the insulating substrate; and a protective film that is formed on the...
US-9,966,471 Stacked Gate-All-Around FinFET and method forming the same
A device includes a first semiconductor strip, a first gate dielectric encircling the first semiconductor strip, a second semiconductor strip overlapping the...
US-9,966,470 FinFET structure
A FinFET device includes a substrate and a fin structure having a semiconductor material layer over the substrate and recessed regions on side walls of the fin...
US-9,966,469 Semiconductor device including fin structure with two channel layers and manufacturing method thereof
A method for manufacturing a semiconductor device includes forming a fin structure having a top face and a first side face and a second side face opposite to...
US-9,966,468 Semiconductor device having reverse U-shaped epitaxial layer and method for fabricating the same
A method for fabricating semiconductor device is disclosed. First, a fin-shaped structure is formed on a substrate, a first liner is formed on the substrate and...
US-9,966,467 Integrated circuit and code generating method
An integrated circuit and a code generating method are described. The integrated circuit includes a plurality of field effect transistors, a plurality of...
US-9,966,466 Semiconductor-on-insulator wafer, semiconductor structure including a transistor, and methods for the formation...
A semiconductor-on-insulator wafer includes a support substrate, an electrically insulating layer over the support substrate and a semiconductor layer over the...
US-9,966,465 Non-volatile memory device
A non-volatile memory device is provided. The non-volatile memory device includes a substrate, a first dielectric layer, a charge trapping layer, a...
US-9,966,464 Method of forming a semiconductor structure having integrated snubber resistance
A semiconductor structure is disclosed. The semiconductor structure includes a source trench in a drift region, the source trench having a source trench...
US-9,966,463 Semiconductor device and method for producing same having multilayer wiring structure with contact hole having...
A method of producing a semiconductor device includes forming an insulating film on a substrate on which a semiconductor layer is formed; removing a part of the...
US-9,966,462 Guard rings for cascode gallium nitride devices
Implementations of semiconductor devices may include: a plurality of drain fingers and a plurality of source fingers interdigitated with one another; at least...
US-9,966,461 Power semiconductor device
A power semiconductor device is disclosed. In one example, the device comprises a semiconductor body having a front side, a backside, a first load terminal, and...
US-9,966,460 Switching device
A switching device includes a semiconductor substrate having a first element range and an ineffective range. First trenches extend in a first direction across...
US-9,966,459 Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistors
A symmetrical lateral bipolar junction transistor (SLBJT) is provided. The SLBJT includes a p-type semiconductor substrate, a n-type well, an emitter of a SLBJT...
US-9,966,458 Spin filter device, method for its manufacture and its use
The present invention relates to a method and a device for providing a current of spin-polarized electrons. More particularly, the present invention is suited...
US-9,966,457 Transistor structure with varied gate cross-sectional area
Aspects of the present disclosure include finFET structures with varied cross-sectional areas and methods of forming the same. Methods according to the present...
US-9,966,456 Methods of forming gate electrodes on a vertical transistor device
One illustrative method of forming a vertical transistor device disclosed herein includes, among other things, forming bottom source/drain (S/D) regions. A...
US-9,966,455 Method for manufacturing a semiconductor device
The reliability of a semiconductor device is improved. A first gate electrode of a dummy gate electrode including silicon is formed over a semiconductor...
US-9,966,454 Contact area to trench silicide resistance reduction by high-resistance interface removal
A method for manufacturing a semiconductor device comprises forming a silicide region on a semiconductor substrate, forming a gate structure on the...
US-9,966,453 Method for doping source and drain regions of a transistor by means of selective amorphisation
Method including the steps consisting in: forming source and drain semiconductor blocks comprising a first layer based on a first crystalline semiconductor...
US-9,966,452 Semiconductor device having a field effect transistor formed on a silicon-on-insulator substrate and...
A semiconductor device includes an SOI substrate and a MISFET formed on the SOI substrate. The SOI substrate has a base substrate, a ground plane region formed...
US-9,966,451 Integrated structures
Some embodiments include an integrated structure having a vertical stack of alternating insulative levels and conductive levels. Recesses extend into the...
US-9,966,450 Dual-gate TFT array substrate and manufacturing method thereof
A dual-gate TFT (thin film transistor) array substrate and a manufacturing method thereof are provided. A source electrode and a drain electrode are formed on a...
US-9,966,449 Methods of forming semiconductor devices, including forming a contact including an alkaline earth metal on a...
Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a metal contact that includes a heavy...
US-9,966,448 Method of making a silicide beneath a vertical structure
According to an exemplary embodiment, a method of forming a vertical structure is provided. The method includes the following operations: providing a substrate;...
US-9,966,447 Method of manufacturing semiconductor device by plasma treatment and heat treatment, and semiconductor device
A technique of manufacturing a semiconductor device of stable operation is provided. There is provided a method of manufacturing a semiconductor device...
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