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Patent # Description
US-1,007,8604 Interrupt coalescing
In an embodiment of the invention, a method comprises: collecting a plurality of interrupts and servicing coalesced active interrupts to a processor if an...
US-1,007,8603 MSI events using dynamic memory monitoring
A method and system for managing message-signaled interrupt-based events sent from an event source to a host or a guest is disclosed. A central processing unit...
US-1,007,8602 Information processing apparatus, memory controller, and memory control method
An information processing apparatus includes: a memory device configured to store data; an arithmetic processor configured to issue a request to be transmitted...
US-1,007,8601 Approach for interfacing a pipeline with two or more interfaces in a processor
In an embodiment, interfacing a pipeline with two or more interfaces in a hardware processor includes providing a single pipeline in a hardware processor. The...
US-1,007,8600 Apparatus and method for vector-based signal routing
An apparatus includes a memory, and a control circuit. The memory stores a vector that identifies a signal that is to be provided by an input/output (I/O)...
US-1,007,8599 Application access control method and electronic apparatus implementing the same
A method and apparatus of access control in an electronic apparatus implementing the method are provided. The method of operating an electronic apparatus...
US-1,007,8598 Maintaining a separate LRU linked list for each thread for multi-threaded access
A plurality of linked lists of elements is maintained corresponding to a plurality of threads accessing a plurality of cache entries, including a first linked...
US-1,007,8597 System and method of distinguishing system management mode entries in a translation address cache of a processor
A processor including a memory that stores a system management mode (SMM) value indicative of whether the processor is in SMM, a translation address cache (TAC)...
US-1,007,8596 Data processing method, computer readable medium and data processing device
A data processing method for a data processing device, the data processing device including: a program execution unit comprising a processor, and memories on a...
US-1,007,8595 Implementing hardware accelerator for storage write cache management for managing cache destage rates and...
A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides...
US-1,007,8594 Cache management for map-reduce applications
A computer manages a cache for a MapReduce application based on a distributed file system that includes one or more storage medium by receiving a map request...
US-1,007,8593 Multiple-core computer processor for reverse time migration
A multi-core computer processor including a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture, a plurality of caches, each of...
US-1,007,8592 Resolving multi-core shared cache access conflicts
Preventing request conflicts within microprocessors and/or computer systems. More particularly, embodiments of the invention relate to a technique to manage...
US-1,007,8591 Data storage cache management
A method of managing a data storage cache, comprising: providing a redundant cache comprising first and second caches associated with first and second storage...
US-1,007,8590 Technique to share information among different cache coherency domains
A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches...
US-1,007,8589 Enforcing data protection in an interconnect
Interconnect circuitry and a method of operating the interconnect circuitry are provided, where the interconnect circuitry is suitable to couple at least two...
US-1,007,8588 Using leases for entries in a translation lookaside buffer
The described embodiments include a computing device with two or more translation lookaside buffers (TLB) that performs operations for handling entries in the...
US-1,007,8587 Mirroring a cache having a modified cache state
In one aspect a method includes determining, by a controller of a memory system, that a cache line of one of a plurality of levels of cache in the memory system...
US-1,007,8586 Out-of-range reference detection device, method, and recording medium
An out-of-range reference detection method according to an exemplary aspect of the invention includes: acquiring a mask value corresponding to a base address...
US-1,007,8585 Creating a dynamic address translation with translation exception qualifiers
An enhanced dynamic address translation facility product is created such that, in one embodiment, a virtual address to be translated and an initial origin...
US-1,007,8584 Reducing minor garbage collection overhead
A method and system are provided for reducing garbage collection overhead. The method includes representing, by a hardware processor, an application program by...
US-1,007,8583 Method and system for reducing memory used in embedded DDRs by using spare drives for OOC GC
Embodiments relating to garbage collection for a deduplicated and compressed storage device are described. One embodiment provides for a data storage system...
US-1,007,8582 Non-volatile memory system having an increased effective number of supported heat levels
A method, according to one embodiment, includes assigning data having a first heat to a first data stream, assigning data having a second heat to a second data...
US-1,007,8581 Processor with instruction cache that performs zero clock retires
A method of retiring cache lines from a response buffer array to an icache array of a processor including providing sequential addresses to the icache array and...
US-1,007,8580 Operations to avoid wrapped mobile application operational errors due to interference from wrapper logic components
A method on a processor of an application wrapper computer includes, for each of a plurality of features of an application program in an application package,...
US-1,007,8579 Metrics-based analysis for testing a service
Techniques are described for determining test cases to test a service, such as a service to manage a purchase contract in an e-commerce environment. Log data...
US-1,007,8578 Analytically selecting which tests are to be executed in a continuous delivery process
A method, system and computer program product for analytically selecting which tests are to be executed in a continuous delivery process. An analytics...
US-1,007,8577 Policy compliance of container images
In some examples, a container image is received, where a container is to be launched from the container image. An executable process is deployable in the...
US-1,007,8576 Remotely debugging an operating system
Remotely debugging a non-responsive operating system (OS) of a computer system. Central processing units (CPUs) in a computer system are bound to receive queues...
US-1,007,8575 Diagnostics of state transitions
A method for diagnosing computer readable instructions related to transfers of control is disclosed. A state transition of a unit of execution within a logical...
US-1,007,8574 Methods and systems for isolating software components
A software testing system operative to test a software application comprising a plurality of software components, at least some of which are highly coupled...
US-1,007,8573 Aggregating data for debugging software
A method for obtaining data to debug an issue that affects a software application. In an embodiment, the method includes at least one computer processor...
US-1,007,8572 Abnormal timing breakpoints
Embodiments of the present invention provide a system, method, and program product for an abnormal timing breakpoints. A computer determines a code section,...
US-1,007,8571 Rule-based adaptive monitoring of application performance
A method for dynamically and adaptively monitoring a system based on its running behavior adjusts monitoring levels of the monitored application in real-time. A...
US-1,007,8570 Determining dynamic statistics based on key value patterns
A method for dynamically updating database statistics and a plurality of access paths associated with at least one database table is provided. The method may...
US-1,007,8569 Self adaptive workload classification and forecasting in multi-tiered storage system using arima time series...
Data storage optimization techniques determine predicted values for I/O statistics using an ARIMA (auto-regressive integrated moving average) model. The ARIMA...
US-1,007,8568 Debugging a computing device
A system includes a host debugger to carry out a debugging flow on a computing device and a debug controller to couple the host debugger to the computing...
US-1,007,8567 Implementing fault tolerance in computer system memory
A method of implementing fault tolerance in computer memory includes translating a logical address to a first physical address for a first memory location in...
US-1,007,8566 Managing health conditions to determine when to restart replication after a swap triggered by a storage health...
Provided are a computer program product, system, and method for managing health conditions to determine when to restart replication after a swap triggered by a...
US-1,007,8565 Error recovery for redundant processing circuits
Methods and circuits are disclosed for error recovery in redundant processing systems. Respective instances of a software program are executed in lockstep on...
US-1,007,8564 Preventing split-brain scenario in a high-availability cluster
As disclosed herein is a tool for preventing split-brain scenario, including determining, by a processor, that a first node of a HA cluster is unable to...
US-1,007,8563 Preventing split-brain scenario in a high-availability cluster
As disclosed herein is a tool for preventing split-brain scenario, including determining, by a processor, that a first node of a HA cluster is unable to...
US-1,007,8562 Transactional distributed lifecycle management of diverse application data structures
A state manager provides transactional distributed lifecycle management of a group of different application-level state providers, namely, differently...
US-1,007,8561 Handling failing memory devices in a dispersed storage network
A method for execution by a dispersed storage and task (DST) execution unit identifying a failing memory device based on memory device diagnostic data. A...
US-1,007,8560 Using run time and historical customer profiling and analytics to determine customer disaster recovery vs....
Aspects of the present invention include a method, system and computer program product. The method includes a processor setting one or more characteristics...
US-1,007,8559 System and method for input data fault recovery in a massively parallel real time computing system
A massively parallel real-time computing system receives input data events across many compute nodes, each with a processing algorithm in its processing...
US-1,007,8558 Database system control method and database system
This database system includes a first site that provides a database and a second site that stores a copy of said database. A first computer for the first site...
US-1,007,8557 Use of replicated copies to improve database backup performance
A backup computing device detects an interruption while receiving a backup copy of a transaction log of a primary database and directs a secondary computing...
US-1,007,8556 Data replication between databases with heterogenious data platforms
A system and method for data replication for databases using an intermediary server, the intermediary server choosing the order in which databases are...
US-1,007,8555 Synthetic full backups for incremental file backups
First and second virtual hard disk files are accessed. The first virtual hard disk file corresponds to a backup of a file and includes a first set of payload...
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