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Patent # Description
US-1,011,5629 Air gap spacer formation for nano-scale semiconductor devices
Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for...
US-1,011,5628 Semiconductor device and manufacture thereof
A semiconductor device and its manufacturing method are presented. The manufacturing method entails: forming a dielectric layer on a semiconductor substrate;...
US-1,011,5627 Semiconductor device
According to one embodiment, a semiconductor device includes a base, a memory cell region on the base comprising a first plurality of conductive layers and a...
US-1,011,5626 Methods for forming isolation blocks of semiconductor devices, semiconductor devices and methods for...
A method for forming an isolation block of a semiconductor device includes providing a semiconductor substrate, performing an etching process to form a...
US-1,011,5625 Methods for removal of hard mask
Embodiments of a method of processing semiconductor devices are presented. The method includes providing a substrate prepared with isolation regions having a...
US-1,011,5624 Method of semiconductor integrated circuit fabrication
A method of semiconductor device fabrication includes providing a substrate having a hardmask layer thereover. The hardmask layer is patterned to expose the...
US-1,011,5623 Substrate processing apparatus
In a substrate processing apparatus, a shield plate includes a first chucking magnetic material (441). The shield plate is moved up and down by a chamber...
US-1,011,5622 Wafer processing laminate and method for processing wafer
A wafer processing laminate including support, temporary adhesive material layer laminated on the support, and wafer stacked on temporary adhesive material...
US-1,011,5621 Method for in-die overlay control using FEOL dummy fill layer
Methods for in-die overlay reticle measurement and the resulting devices are disclosed. Embodiments include providing parallel structures in a first layer on a...
US-1,011,5620 Apparatus and method for adjustment of a handling device for handling electronic components
Disclosed is an apparatus for handling electronic components and a method of adjusting the position of at least one handling device of an apparatus for handling...
US-1,011,5618 Reticle transfer system and method
A fabrication system comprises placing an internal buffer at a default position of a local system, wherein the default position is a first boundary between a...
US-1,011,5617 System architecture for vacuum processing
A system for processing substrates in plasma chambers, such that all substrates transport and loading/unloading operations are performed in atmospheric...
US-1,011,5616 Carrier adapter insert apparatus and carrier adapter insert detection methods
Methods, apparatus, and assemblies are provided for an adapter insert including an adapter frame including a support rail adapted to support one or more...
US-1,011,5615 Substrate processing apparatus and control method of substrate processing apparatus
According to one embodiment, there is provided a substrate processing apparatus including a processing unit and a manipulator. The processing unit processes a...
US-1,011,5614 Transfer chamber and method for preventing adhesion of particle
A transfer chamber is provided between a processing unit for performing a predetermined process on a target substrate to be processed in a depressurized...
US-1,011,5613 Method of fabricating a fan-out panel level package and a carrier tape film therefor
The present disclosure relates to a method of fabricating a semiconductor package. The method may include forming a cavity in a package substrate and providing...
US-1,011,5612 Manufacturing method for vertical cavity surface emitting laser
A manufacturing method for a vertical cavity surface emitting laser includes steps of forming, on a substrate, a multilayer body including first and second...
US-1,011,5611 Substrate cooling method, substrate transfer method, and load-lock mechanism
A substrate cooling method is for, using a load-lock mechanism for controlling a pressure therein between a first pressure close to an atmospheric pressure and...
US-1,011,5610 Substrate processing apparatus
A substrate processing apparatus includes a spin chuck, a shielding member disposed over the substrate, a cup surrounding a spin base, an upper gas valve that...
US-1,011,5609 Separation and regeneration apparatus and substrate processing apparatus
Disclosed is a separation and regeneration apparatus including: a supercritical processing unit configured to generate a mixed gas including a first...
US-1,011,5608 Method and apparatus for rapid pump-down of a high-vacuum loadlock
A gas expansion module for use with semiconductor wafer loadlocks and other regulated-pressure components of semiconductor processing tools is provided. The gas...
US-1,011,5607 Method and apparatus for wafer outgassing control
Embodiments disclosed herein generally relate to apparatus and methods for controlling substrate outgassing such that hazardous gasses are eliminated from a...
US-1,011,5606 Methods of promoting adhesion between underfill and conductive bumps and structures formed thereby
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include...
US-1,011,5605 Vacuum assisted sealing processes and systems for increasing air cavity package manufacturing rates
The present disclosure describes a sealing processes and structure for sealing air cavity electronic packages using a thermosetting, thermal plastic, other...
US-1,011,5604 Semiconductor package and method for fabricating base for semiconductor package
A method for fabricating a base for a semiconductor package is provided. The method operates by providing a carrier with conductive seed layers on the top...
US-1,011,5603 Removal of surface passivation
Methods for removing a passivation film from a copper surface can include exposing the passivation film to a vapor phase organic reactant, for example at a...
US-1,011,5602 Method of manufacturing semiconductor devices
A method of manufacturing a semiconductor device includes alternately stacking mold insulating layers and sacrificial layers on a substrate; forming channel...
US-1,011,5601 Selective film formation for raised and recessed features using deposition and etching processes
Embodiments of the invention provide a processing method for selective film formation for raised and recessed features using deposition and etching processes....
US-1,011,5600 Method of etching semiconductor structures with etch gas
Disclosed are sulfur-containing compounds for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in...
US-1,011,5599 Spectrally and temporally engineered processing using photoelectrochemistry
Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and...
US-1,011,5598 Substrate holder, a method for holding a substrate with a substrate holder, and a plating apparatus
To suppress thicknesses of a plating film of dies adjacent to a portion in which patterns are not formed on a resist, and improve uniformity of a plated metal...
US-1,011,5597 Self-aligned dual-metal silicide and germanide formation
A device having an epitaxial region and dual metal-semiconductor alloy surfaces is provided. The epitaxial region includes an upward facing facet and a downward...
US-1,011,5596 Method of fabricating a semiconductor device having a T-shape in the metal gate line-end
A method of fabricating a metal gate structure in a semiconductor device is disclosed. The method comprises removing a dummy poly gate, removing IL oxide and...
US-1,011,5595 Method of manufacturing semiconductor device and semiconductor device
A dopant is ion-injected to a semiconductor layer formed of a group III-V compound semiconductor containing nitrogen as a Group V element. A first activation...
US-1,011,5594 Method of forming fine island patterns of semiconductor devices
A method of forming fine island patterns of semiconductor devices includes: forming a plurality of first mask pillars on a hard mask layer on a substrate;...
US-1,011,5593 Chemical modification of hardmask films for enhanced etching and selective removal
Embodiments include a method of processing a hardmask that includes forming an alloyed carbon hardmask over an underlying layer. In an embodiment, the alloyed...
US-1,011,5592 Patterning process with silicon mask layer
A lithography method is provided in accordance with some embodiments. The lithography method includes forming an under layer on a substrate; forming a...
US-1,011,5591 Selective SiARC removal
Methods and systems for selective silicon anti-reflective coating (SiARC) removal are described. An embodiment of a method includes providing a substrate in a...
US-1,011,5590 Manufacturing of silicon strained in tension on insulator by amorphisation then recrystallisation
Method for making a strained silicon structure, wherein a silicon germanium layer is formed on the silicon layer, followed by another layer with a lower...
US-1,011,5589 Epitaxial substrate for electronic devices, electronic device, method for producing the epitaxial substrate for...
An epitaxial substrate for electronic devices, including: a Si-based substrate; an AlN initial layer provided on the Si-based substrate; and a buffer layer...
US-1,011,5588 Substrate treating apparatus and substrate treating method
A substrate treating apparatus including an unloading order changing unit. The unloading order changing unit reverses an order, in regard to unloading of...
US-1,011,5587 Method of manufacturing semiconductor device
A reverse blocking IGBT is manufactured using a silicon wafer sliced from a single crystal silicon ingot which is manufactured by a floating method using a...
US-1,011,5586 Method for depositing a planarization layer using polymerization chemical vapor deposition
A method is provided for depositing a planarization layer over features on a substrate using sequential polymerization chemical vapor deposition. According to...
US-1,011,5585 Hardmask composition and methods thereof
Provided is a material composition and method for that includes forming a silicon-based resin over a substrate. In various embodiments, the silicon-based resin...
US-1,011,5584 Composition and method for forming a dielectric layer
A porous layer is described. The porous layer comprises a solidified sol-gel inorganic material having a distribution of nanometric voids, wherein at least some...
US-1,011,5583 Method of manufacturing semiconductor device
There is provided a method of manufacturing a semiconductor device which includes: supplying a process gas to a process chamber in a state in which a substrate...
US-1,011,5582 Semiconductor device and method for manufacturing the same
Provided herein is a semiconductor device is provided. The semiconductor device includes a substrate including a MEMS region and a connection region thereon; a...
US-1,011,5581 Removal of particles on back side of wafer
The present disclosure provides a method of cleaning a semiconductor wafer during a process of fabricating a semiconductor device. The method includes loading a...
US-1,011,5580 Method for manufacturing an SOI wafer
A method for manufacturing an SOI wafer having SOI layer includes a thinning step to adjust SOI film thickness of the SOI wafer, including the steps of: (A1)...
US-1,011,5579 Method for manufacturing wafer-level semiconductor packages
During the manufacture of a semiconductor package, a semiconductor wafer including a plurality of bond pads on a surface of the wafer is provided and the...
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