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Patent # Description
US-1,023,6380 Precise control of vertical transistor gate length
Transistor and methods of forming the same include forming a channel fin on a bottom source/drain region. A dielectric fill is formed around the channel fin...
US-1,023,6379 Vertical FET with self-aligned source/drain regions and gate length based on channel epitaxial growth process
A fin extends from, and is perpendicular to, a planar surface of a substrate. A self-aligned bottom source/drain conductor is on the substrate adjacent the fin,...
US-1,023,6378 Electronic junction device with a reduced recovery time for applications subject to the current recirculation...
An integrated electronic device having a semiconductor body including: a first electrode region having a first type of conductivity; and a second electrode...
US-1,023,6377 Semiconductor device
A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third...
US-1,023,6376 High-side power device and manufacturing method thereof
A high-side device includes: a substrate, an epitaxial layer, a high voltage well, a body region, a gate, a source, a drain, and a buried region. A channel...
US-1,023,6375 High voltage metal oxide semiconductor device and manufacturing method thereof
A high voltage MOS device includes: a well region with a first conductive type, a body region with a second conductive type, a gate, plural source regions with...
US-1,023,6374 Semiconductor device manufacturing method and semiconductor device
In order to improve the performance of a semiconductor device, a p type impurity is ion implanted into an area of an n type semiconductor film that is...
US-1,023,6373 Semiconductor device and production method therefor
To suppress current leakage in a semiconductor device having a gate insulating film and a gate electrode. A gate electrode is continuously formed in a film via...
US-1,023,6372 Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
A silicon carbide semiconductor device, including a silicon carbide substrate, multiple trenches provided in the silicon carbide substrate, a first...
US-1,023,6371 Semiconductor device and method of manufacturing the same
Performance of a semiconductor device is improved without increasing an area size of a semiconductor chip. For example, a source electrode of a power transistor...
US-1,023,6370 Semiconductor device and method of manufacturing the same, power converter, three-phase motor system,...
An object of the present invention is to suppress energization deterioration due to crystal defects in a semiconductor device including SiC-MOSFET. To solve...
US-1,023,6369 Techniques for forming non-planar germanium quantum well devices
Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV...
US-1,023,6368 Semiconductor device and method for manufacturing the same
A semiconductor device according to the present invention includes a channel region of a first conductivity type, disposed at a front surface portion of a...
US-1,023,6367 Bipolar semiconductor device with silicon alloy region in silicon well and method for making
A device includes a substrate, a first well doped with dopants of a first conductivity type defined in the substrate, and a second well doped with dopants of a...
US-1,023,6366 Semiconductor-on-insulator lateral heterojunction bipolar transistor having epitaxially grown intrinsic base...
After forming a trench extending through an insulator layer and an underlying top semiconductor portion that is comprised of a first semiconductor material and...
US-1,023,6365 Homoepitaxial tunnel barriers with hydrogenated graphene-on-graphene for room temperature electronic device...
A homoepitaxial, ultrathin tunnel barrier-based electronic device in which the tunnel barrier and transport channel are made of the same material--graphene.
US-1,023,6363 Vertical field-effect transistors with controlled dimensions
Device structures and fabrication methods for a vertical field-effect transistor. A semiconductor fin is formed that projects from a first source/drain region....
US-1,023,6362 Nanowire FET including nanowire channel spacers
A stacked nanowire field effect transistor (FET) including a plurality of vertically stacked nanowire channels. Each nanowire channel is vertically separated...
US-1,023,6361 Method for forming mask pattern, thin film transistor and method for forming the same, and display device
A method for forming a mask pattern is provided, comprising forming a negative photoresist on a substrate; in an environment without oxygen, to performing a...
US-1,023,6360 Method of forming vertical transistor having dual bottom spacers
A method of forming a spacer for a vertical transistor is provided. The method includes forming a fin structure on a substrate, depositing a first spacer on...
US-1,023,6359 Replacement metal gate structures
Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method...
US-1,023,6358 Integration of gate structures and spacers with air gaps
Structures for a field-effect transistor and methods for forming a field-effect transistor. The structure includes a gate structure having a sidewall and a...
US-1,023,6357 Semiconductor device and manufacturing method of the same
A semiconductor device having stable electrical characteristics is provided. A semiconductor device that can be miniaturized or highly integrated is provided....
US-1,023,6356 Nonplanar device with thinned lower body portion and method of fabrication
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a...
US-1,023,6355 Fabrication of a vertical fin field effect transistor with a reduced contact resistance
A method of forming a vertical fin field effect transistor (vertical finFET) with an increased surface area between a source/drain contact and a doped region,...
US-1,023,6354 Three dimensional monolithic LDMOS transistor
A three dimensional monolithic LDMOS transistor implements a drain structure vertically disposed above a level of the structure that includes a drain connection...
US-1,023,6353 Semiconductor device, power supply circuit, and computer
A semiconductor device of an embodiment includes a first nitride semiconductor layer, a second nitride semiconductor layer located on the first nitride...
US-1,023,6352 Method for manufacturing a semiconductor device
A method for manufacturing a semiconductor device includes: providing a semiconductor substrate having a first side; forming a trench in the semiconductor...
US-1,023,6351 Power semiconductor device trench having field plate and gate electrode
A method of processing a power semiconductor device includes: providing a semiconductor body with a trench extending into the semiconductor body along an...
US-1,023,6350 Method, apparatus and system for a high density middle of line flow
At least one method, apparatus and system disclosed herein for forming a finFET device. A gate structure comprising a gate spacer on a semiconductor wafer is...
US-1,023,6349 P-type oxide, p-type oxide-producing composition, method for producing p-type oxide, semiconductor device,...
A p-type oxide which is amorphous and is represented by the following compositional formula: xAO.yCu.sub.2O where x denotes a proportion by mole of AO and y...
US-1,023,6348 Silicon carbide semiconductor device with double trench and method of making same
A silicon carbide semiconductor device includes an n-type drift layer and a p-type epitaxial base layer deposited on an n-type silicon carbide substrate, as...
US-1,023,6347 Method of producing an electronic device with a graphene device and semiconductor device formed on a common...
A method for producing an electronic device involves forming a graphene precursor on a first portion of a common semiconductor substrate, forming a graphene...
US-1,023,6346 Transistor having a high germanium percentage fin channel and a gradient source/drain junction doping profile
Embodiments of the invention are directed to a method of forming a semiconductor device. A non-limiting example method includes forming a fin channel over a...
US-1,023,6345 Field effect transistor having a Fermi filter between a source and source contact thereof
Fermi filter field effect transistors having a Fermi filter between a source and a source contact, systems incorporating such transistors, and methods for...
US-1,023,6344 Tunnel transistors with abrupt junctions
A tunnel field effect transistor (TFET) including a first doped source region for a first type TFET or a second doped source region for a second type TFET; a...
US-1,023,6343 Strain retention semiconductor member for channel SiGe layer of pFET
A pFET includes a semiconductor-on-insulator (SOI) substrate; and a trench isolation within the SOI substrate, the trench isolation including a raised portion...
US-1,023,6342 Electronic device including a termination structure
An electronic device can include a termination structure that includes a substrate, a semiconductor layer, and a first trench. The substrate includes a...
US-1,023,6341 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes first to fourth semiconductor regions, first and second electrodes, and a first insulating film....
US-1,023,6340 Termination implant enrichment for shielded gate MOSFETs
In a general aspect, a power semiconductor device can include a first trench shield electrode and a second trench shield electrode defined in a semiconductor...
US-1,023,6339 Semiconductor device
According to one embodiment, a semiconductor device includes first to sixth semiconductor regions, a first electrode, and a first insulating film. The first...
US-1,023,6338 SiC single crystal seed, SiC ingot, SiC single crystal seed production method, and SiC single crystal ingot...
A SiC single crystal seed of the present invention has a main surface with an offset angle of at least 2.degree. but not more than 20.degree. relative to the...
US-1,023,6337 Semiconductor device and method of forming substrate including embedded component with symmetrical structure
A semiconductor device comprises a first conductive layer. A second conductive layer is formed over the first conductive layer. A semiconductor component is...
US-1,023,6336 Organic electroluminescence display device with spacers
Provided is an organic electroluminescence display device. The organic electroluminescence display device includes a bank that is provided so as to surround a...
US-1,023,6335 Display device
The present disclosure is provided a display device. The display device includes subpixels and at least one scan line. The subpixels are formed on a first...
US-1,023,6334 Organic light emitting diode display
An OLED display includes a substrate including a display area and a non-display area disposed adjacent to the display area, a pixel circuit portion disposed in...
US-1,023,6333 Organic light-emitting display device
An organic light-emitting display device having reduced color dispersion effects includes a substrate, a first conductive line disposed on the substrate, a...
US-1,023,6332 Organic light emitting diode display having high luminescence
The present disclosure relates to an organic light emitting diode display having high luminescence. The present disclosure suggests an organic light emitting...
US-1,023,6331 Light-emitting device and display device
Although an organic resin substrate is highly effective at reducing the weight and improving the shock resistance of a display device, it is required to improve...
US-1,023,6330 Display device and method for manufacturing the same
A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of...
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