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Patent # Description
US-1,023,6329 Display device
A display device is disclosed, which includes: a first substrate with a data line disposed thereon, wherein the data line extends along a data ...
US-1,023,6328 Method of manufacturing organic light-emitting display device
A method of manufacturing an organic light-emitting display device includes forming pixel electrodes on a substrate, forming a first protective layer with a...
US-1,023,6327 In-cell touch organic light-emitting display device
Disclosed is an organic light-emitting display device that has improved color viewing angle characteristics while including a mesh pattern. The organic...
US-1,023,6326 Organic light emitting display device having sub pixels of different areas and distances
Provided is an organic light emitting display device including a plurality of sub pixels. Areas of emission regions of green sub pixels of the plurality of sub...
US-1,023,6325 Self-light emitting display unit and electronic device
A self-light emitting display unit capable of improving manufacturing yield is provided. Sizes of color pixel circuits corresponding to pixels for R, G, and B...
US-1,023,6324 Full-color light emitting diode display having improved luminance and method of manufacturing the same
A full-color light emitting diode (LED) display having an improved luminance is provided herein. More specifically, provided herein are a full-color LED...
US-1,023,6322 Solar cell module
A solar cell module according to an embodiment includes: a light transmissive first substrate; a second substrate; at least one cell array disposed between the...
US-1,023,6321 Light-emitting component, light-emitting device, and image forming apparatus
A light-emitting component includes a light-emitting element, a thyristor, and a light-absorbing layer. The thyristor includes a semiconductor layer having a...
US-1,023,6320 Fractal-edge thin film and method of manufacture
A method of manufacturing a fractal-edge thin film includes determining an area shape to be covered by the fractal-edge thin film. The method also includes...
US-1,023,6319 Photodetector and imaging device
A photodetector includes a lower contact layer, a first absorber layer that is formed over the lower contact layer and that is photosensitive to light of a...
US-1,023,6318 Solid-state imaging device, driving method for solid-state imaging device, and electronic appliance
The present disclosure relates to a solid-state imaging device, a driving method for the same, and an electronic appliance, and an object is to provide a...
US-1,023,6317 Heterogeneous integration using wafer-to-wafer stacking with die size adjustment
A method is provided for three-dimensional wafer scale integration of heterogeneous wafers with unequal die sizes that include a first wafer and a second wafer....
US-1,023,6316 Display device with separation member including steps
A display device includes: a substrate; a plurality of light-emission elements arranged, on the substrate, in a first direction and a second direction...
US-1,023,6315 Solid-state image pickup element, image pickup apparatus, electronic apparatus, and production method
Provided is a solid-state image pickup element including: a sensor unit configured to generate an electrical signal in response to incident light; a color...
US-1,023,6314 Optical devices and opto-electronic modules and methods for manufacturing the same
The optical device comprises a first substrate comprising at least one optical structure comprising a main portion and a surrounding portion at least partially...
US-1,023,6313 Sensor package structure
A sensor package structure includes a substrate, a sensor chip disposed on the substrate, several metal wires electrically connected to the substrate and the...
US-1,023,6312 Camera module and electronic apparatus to lower risk of breakage of camera module
The present technology relates to a camera module and an electronic apparatus that can lower the risk of breakage. An imaging element has a light receiving...
US-1,023,6311 Solid-state imaging element and electronic device to improve quality of an image
The present technology relates to a solid-state imaging element and an electronic device capable of improving image quality of the solid-state imaging element....
US-1,023,6310 Transistor substrate, and organic light emitting display panel including the same having a coupled driving gate...
Disclosed are a transistor substrate, an organic light emitting display panel including the same, a method of manufacturing the transistor substrate, and an...
US-1,023,6309 Display device and manufacturing method thereof
A display device according to an exemplary embodiment includes: a substrate including a pixel area and a transmission area adjacent to the pixel area; a...
US-1,023,6308 Thin film transistor, manufacturing method thereof, and display device having the same
A thin film transistor includes a first blocking layer disposed on a substrate, and an active pattern disposed on the first blocking layer. The active pattern...
US-1,023,6307 Manufacturing method of display device
A manufacturing method of a display device comprises steps: a lining layer is formed on an array substrate; a conduction layer is formed on the array substrate,...
US-1,023,6306 Semiconductor device and display device including the same
To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including...
US-1,023,6305 Semiconductor device
A semiconductor device including a capacitor whose charge capacity is increased while improving the aperture ratio is provided. Further, a semiconductor device...
US-1,023,6304 Gas barrier laminate, semiconductor device, display element, display device, and system
A gas barrier laminate includes a substrate and a barrier layer formed on at least one of faces of the substrate. The barrier layer includes composite oxide...
US-1,023,6303 Semiconductor device having oxide semiconductor layer
A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and...
US-1,023,6302 Standard cell architecture for diffusion based on fin count
Disclosed systems and methods pertain to finfet based integrated circuits designed with logic cell architectures which support multiple diffusion regions for...
US-1,023,6301 Methods of forming an array of elevationally-extending strings of memory cells
A method of forming an array of elevationally-extending strings of memory cells comprises forming conductively-doped semiconductor material directly above and...
US-1,023,6300 On-pitch drain select level isolation structure for three-dimensional memory device and method of making the same
A three-dimensional memory structure includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, an array of...
US-1,023,6299 Three-dimensional charge trapping NAND cell with discrete charge trapping film
A three-dimensional charge trap semiconductor device is constructed with alternating insulating and gate layers stacked over a substrate. During the...
US-1,023,6298 Non-volatile memory devices with vertically integrated capacitor electrodes
Provided is a vertical non-volatile memory device in which a capacitor constituting a peripheral circuit region is formed as a vertical type so that an area...
US-1,023,6297 Single poly non-volatile memory device, method of manufacturing the same and single poly non-volatile memory...
A single poly non-volatile memory device that includes: a first type lower well; first and second wells separately formed in an upper portion of the first type...
US-1,023,6296 Cross-coupled contact structure on IC products and methods of making such contact structures
An IC product disclosed herein includes a first merged doped source/drain (MDSD) region having an upper surface, a first side surface and a second side surface...
US-1,023,6295 Method of fabricating semiconductor device using dry etching
A method of fabricating a semiconductor device includes forming a material layer and a mask pattern on a substrate, mounting the substrate onto an electrostatic...
US-1,023,6294 Method of manufacturing a semiconductor device
The present invention proposes a method of manufacturing a semiconductor device, which includes the steps of providing a substrate with a memory region and a...
US-1,023,6293 FinFET CMOS with silicon fin N-channel FET and silicon germanium fin P-channel FET
A substrate having a silicon region and a silicon germanium region is provided. A first set of fins in the silicon region and a second set of fins in the...
US-1,023,6292 Complementary FETs with wrap around contacts and methods of forming same
The present disclosure relates generally to wrap around contact formation in source/drain regions of a semiconductor device such as an integrated circuit (IC),...
US-1,023,6291 Methods, apparatus and system for STI recess control for highly scaled finFET devices
At least one method, apparatus and system are disclosed for forming a fin field effect transistor (finFET) having an oxide level in a fin array region within a...
US-1,023,6290 Method and structure for improving vertical transistor
A vertical fin field-effect-transistor and a method for fabricating the same. The vertical fin field-effect-transistor includes a first source/drain disposed in...
US-1,023,6289 Approach to fabrication of an on-chip resistor with a field effect transistor
A method of forming a resistor adjacent to a fin field effect transistor on a substrate, including, forming a plurality of vertical fins on the substrate,...
US-1,023,6288 Integrated on-chip junction capacitor for power management integrated circuit device
A power semiconductor device includes a substrate of a first conductivity type, a buried layer of a second conductivity type formed in at least a portion of the...
US-1,023,6287 Semiconductor device including semiconductor electrically surrounded by electric field of conductive film
A semiconductor device includes a semiconductor, first and second conductive films each including a first region in contact with a top surface of the...
US-1,023,6286 Semiconductor integrated circuit apparatus and manufacturing method for same
A semiconductor integrated circuit apparatus and a manufacturing method for the same are provided in such a manner that a leak current caused by a ballast...
US-1,023,6285 Electrostatic discharge (ESD) protection device
A semiconductor device includes a semiconductor substrate and a pair of first well regions formed in the semiconductor substrate, wherein the pair of first well...
US-1,023,6284 Semiconductor device for preventing field inversion
A semiconductor device includes a semiconductor layer having an element formation region in which a semiconductor element is formed. An element isolation well...
US-1,023,6283 Semiconductor integrated circuit device having a first cell row and a second cell row
Disclosed herein is a semiconductor integrated circuit device which includes a standard cell with a plurality of fins extending in a first direction and...
US-1,023,6282 Partial layer transfer system and method
An embodiment includes an apparatus comprising: a first layer, including a first semiconductor switching element, coupled to a first portion of a first bonding...
US-1,023,6281 Microelectronics package with self-aligned stacked-die assembly
The present disclosure relates to a microelectronics package with a self-aligned stacked-die assembly and a process for making the same. The disclosed...
US-1,023,6280 Light emitting device package and display device using the same
A light emitting device package is provided. The light emitting device package includes three light emitting diode (LED) chips configured to emit light having...
US-1,023,6279 Emissive display with light management system
A method is provided for fabricating an emissive display substrate with a light management system. The method provides a transparent first substrate with a top...
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