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Patent # Description
US-1,024,3072 Method for forming a lateral super-junction MOSFET device and termination structure
A method for forming a lateral superjunction MOSFET device includes forming a semiconductor body including a lateral superjunction structure and a first column...
US-1,024,3071 Transistor with field electrode
Disclosed is a transistor device and a method for producing thereof. The transistor device includes at least one transistor cell, wherein the at least one...
US-1,024,3070 Semiconductor device and method for manufacturing the same
A property of a semiconductor device (high electron mobility transistor) is improved. A semiconductor device having a buffer layer, a channel layer, an electron...
US-1,024,3069 Gallium nitride transistor having a source/drain structure including a single-crystal portion abutting a 2D...
The present description relates to a gallium nitride transistor which includes at least one source/drain structure having low contact resistance between a 2D...
US-1,024,3068 Semiconductor device
The performance of a semiconductor device is improved. An emitter electrode is coupled to a P-type body region and an N.sup.+-type emitter region of a linear...
US-1,024,3067 Semiconductor device and method for manufacturing the same
A semiconductor device includes a first semiconductor layer on one main surface of a semiconductor substrate; a plurality of trench gates in the first...
US-1,024,3066 Producing a semiconductor device by epitaxial growth
A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing,...
US-1,024,3064 Semiconductor device and method for manufacturing the same
To provide a highly reliable semiconductor device by giving stable electrical characteristics to a transistor including an oxide semiconductor film. A gate...
US-1,024,3063 Method of uniform channel formation
Embodiments described herein generally provide a method and apparatus to form semiconductor devices. Specifically, embodiments describe an apparatus and methods...
US-1,024,3062 Fabrication of a vertical fin field effect transistor having a consistent channel width
A method of forming a vertical fin field effect transistor having a consistent channel width, including forming one or more vertical fin(s) on the substrate,...
US-1,024,3061 Nanosheet transistor
Inner and outer spacers for nanosheet transistors are formed using techniques that improve junction uniformity. One nanosheet transistor device includes outer...
US-1,024,3060 Uniform low-k inner spacer module in gate-all-around (GAA) transistors
Embodiments are directed to a method of forming a stacked nanosheet and resulting structures having uniform low-k inner spacers. A nanosheet stack is formed...
US-1,024,3059 Source/drain parasitic capacitance reduction in FinFET-based semiconductor structure having tucked fins
A method of reducing parasitic capacitance includes providing a starting semiconductor structure, the starting semiconductor structure including a semiconductor...
US-1,024,3058 Semiconductor device and electrical device
According to one embodiment, a semiconductor device includes a first semiconductor layer including a nitride semiconductor, a first electrode separated from the...
US-1,024,3057 MISHFET having a comparatively high and selectable or customizable breakdown voltage
Representative embodiments provide an InAlN/GaN MISHFET having a predetermined breakdown voltage, calibrated to a permittivity-thickness parameter and...
US-1,024,3056 Semiconductor device and method for fabricating the same
A semiconductor device includes a field insulating film including a first region and a second region on a substrate, a recess in the first region of the field...
US-1,024,3055 Shared metal gate stack with tunable work function
Semiconductor devices include at least one semiconductor fin in each of a first region and a second region. A first work function stack that includes a bottom...
US-1,024,3054 Integrating standard-gate and extended-gate nanosheet transistors on the same substrate
Embodiments of the invention are directed to fabrication operations for co-integrating standard-gate (SG) and extended-gate (EG) nanosheet/nanowire transistors...
US-1,024,3053 Gate contact structure positioned above an active region of a transistor device
One illustrative IC product disclosed herein includes a gate structure for a transistor, a conductive source/drain contact structure and an insulating...
US-1,024,3052 Semiconductor memory device and method for manufacturing the same
According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor portion, and an insulating portion. The...
US-1,024,3051 Transistor device with a field electrode that includes two layers
Disclosed is a transistor device and a method for producing a transistor device. The transistor device includes: a source region, a drift region, and a body...
US-1,024,3050 Device isolation using preferential oxidation of the bulk substrate
A structure includes a semiconductor substrate, a semiconductor buffer layer disposed on the semiconductor substrate, an oxide layer disposed on the buffer...
US-1,024,3049 Nitride semiconductor device
A nitride semiconductor device includes a first semiconductor layer including a nitride semiconductor, a second semiconductor layer contacting the first...
US-1,024,3048 High dose antimony implant through screen layer for n-type buried layer integration
A microelectronic device having an n-type buried layer (NBL) is formed by forming a thin screen layer on the top surface of the substrate. Antimony is implanted...
US-1,024,3047 Active and passive components with deep trench isolation structures
The present disclosure relates to semiconductor structures and, more particularly, to active and passive radio frequency (RF) components with deep trench...
US-1,024,3046 Fully depleted silicon-on-insulator device formation
A p-type metal-oxide-semiconductor (pMOS) planar fully depleted silicon-on-insulator (FDSOI) device and a method of fabricating the pMOS FDSOI are described....
US-1,024,3045 Semiconductor device
A semiconductor device is provided. The semiconductor device includes a fin-type pattern formed on a substrate and including first and second sidewalls, which...
US-1,024,3044 FinFETs with high quality source/drain structures
A semiconductor structure is provided that includes a silicon germanium alloy fin located on a portion of a topmost surface of an insulator layer. A functional...
US-1,024,3043 Self-aligned air gap spacer for nanosheet CMOS devices
A semiconductor structure is provided that contains a plurality of vertically stacked and spaced apart semiconductor nanosheets in which an inner spacer liner...
US-1,024,3042 FinFET with reduced parasitic capacitance
A semiconductor device including at least one fin extending upward from a substrate and a gate on the substrate, wherein the gate includes outer sidewalls,...
US-1,024,3041 Vertical fin field effect transistor with air gap spacers
A fin field effect transistor device with air gaps, including a source/drain layer on a substrate, one or more vertical fin(s) in contact with source/drain...
US-1,024,3040 Semiconductor device
A semiconductor device including a transistor disposed on a first region of a substrate, the transistor including source/drain regions, a plurality of channel...
US-1,024,3039 Super-junction semiconductor power devices with fast switching capability
A super junction (SJ) device may include one or more charge balance (CB) layers. Each CB layer may include an epitaxial (epi) layer having a first conductivity...
US-1,024,3038 Semiconductor device
According to one embodiment, a semiconductor device includes a first conductive portion, a semiconductor portion including silicon carbide, and a first...
US-1,024,3037 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes first to fourth semiconductor regions, a first electrode, and a first insulating film. The first...
US-1,024,3036 Semiconductor structure and manufacturing method thereof and terminal area structure of semiconductor device
A semiconductor structure including a substrate, a first dielectric layer, a first conductive layer, a positioning part, two spacers, and a second conductive...
US-1,024,3035 Method of manufacturing switching element
A method of manufacturing a switching element is provided. The method including: preparing a semiconductor substrate which includes an n-type drain region, a...
US-1,024,3034 Pillar resistor structures for integrated circuitry
Integrated circuit structures including a pillar resistor disposed over a surface of a substrate, and fabrication techniques to form such a resistor in...
US-1,024,3033 Organic light emitting diode display and manufacturing method thereof
An organic light emitting diode (OLED) display includes: a substrate; a scan line on the substrate, extending in a first direction, and configured to transmit a...
US-1,024,3032 Display device
A selection transistor and a light-emitting transistor are formed in a pixel. The selection transistor includes a gate electrode connected to a scan line, a...
US-1,024,3031 Display device
A display device includes a substrate including a first plastic layer, a second plastic layer on the first plastic layer, and a black organic layer between the...
US-1,024,3030 Foldable display design
A display device comprises a substrate having a foldable first region and a second region adjacent to the foldable first region, wherein a folding axis overlaps...
US-1,024,3029 Electroluminescent display device
Discussed is an electroluminescent display device that may include a first emission layer provided to correspond to at least two among a plurality of sub...
US-1,024,3028 Organic electroluminescent element and lighting device with buffer layer
An organic EL element includes: a substrate that is light-transmissive; a pair of electrode layers (first electrode layer and second electrode layer) disposed...
US-1,024,3027 Display panel, fabricating method thereof, and display apparatus
In accordance with various embodiments of the disclosed subject matter, a display panel, a fabricating method thereof, and a related display apparatus are...
US-1,024,3026 Display device
A display device may include a pixel and a light shutter. The pixel may include a first region and a second region. The light shutter may be disposed in the...
US-1,024,3025 Display device including a light source unit at a pad area of a first substrate
A display device includes: a first substrate including a display area and a pad area; a second substrate facing the first substrate; a touch unit on the second...
US-1,024,3024 Display apparatus
A display apparatus includes a substrate, a display unit, a first wire unit, and a dummy unit. The substrate includes a first area, a second area, and a bending...
US-1,024,3023 Top emission AMOLED displays using two emissive layers
Full-color pixel arrangements for use in devices such as OLED displays are provided, in which multiple sub-pixels are configured to emit different colors of...
US-1,024,3022 Image sensors and methods of forming image sensors
Image sensors are provided. An image sensor includes a color filter layer. The image sensor includes a metal structure adjacent a sidewall of the color filter...
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