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Patent # Description
US-1,025,6239 Spacer formation preventing gate bending
A method of forming a semiconductor structure includes depositing a spacer material over a top surface of a substrate and two or more spaced-apart gates formed...
US-1,025,6238 Preserving channel strain in fin cuts
A method of forming a semiconductor structure includes forming a fin cut mask over a region in a fin field-effect transistor (finFET) structure. The finFET...
US-1,025,6237 Integrated circuit device and method of manufacturing the same
An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a...
US-1,025,6236 Forming switch circuit with controllable phase node ringing
A switch circuit includes a first MOS transistor and a second MOS transistor of a same conductivity type connected in parallel between a first terminal and a...
US-1,025,6235 Vertical transistors and methods of forming same
One aspect of the disclosure relates to an integrated circuit structure. The integrated circuit structure may include a fin having a first source/drain region...
US-1,025,6234 Semiconductor device
A semiconductor device includes a semiconductor substrate provided with an IGBT cell having a collector region and a diode cell having a cathode region, a first...
US-1,025,6233 Device including resistor-capacitor (RC) structure and method of making the same
A method for forming a semiconductor device and the resulting device are provided. At least one capacitor in a first gate structure is formed over a substrate....
US-1,025,6232 Semiconductor device including a switching element and a sense diode
A semiconductor device provided herein includes: a semiconductor substrate; an upper main electrode provided above the semiconductor substrate; a sense anode...
US-1,025,6231 Forming vertical transistors and metal-insulator-metal capacitors on the same chip
A device with a vertical transistor and a metal-insulator-metal (MIM) capacitor on a same substrate includes a vertical transistor including a bottom...
US-1,025,6230 Co-fabrication of vertical diodes and fin field effect transistors on the same substrate
A method of forming a vertical finFET and vertical diode device on the same substrate, including forming a channel layer stack on a heavily doped layer; forming...
US-1,025,6229 Semiconductor device and manufacturing method
It is aimed to realize both of reserving a channel formation region and suppressing a latch-up. A semiconductor device is provided, including: a semiconductor...
US-1,025,6228 Semiconductor device
A semiconductor device includes a MOS transistor which is coupled between two terminals and discharges current which flows caused by generation of static...
US-1,025,6227 Semiconductor device having multiple gate pads
Disclosed are semiconductor devices that include additional gate pads, and methods of fabricating and testing such devices. A device may include a first gate...
US-1,025,6226 Display device including electrostatic discharge circuit
The present invention relates to a display device including a static electricity discharge circuit. The display device according to an exemplary embodiment of...
US-1,025,6225 Gate-less electrostatic discharge systems and methods for forming
A gate-less electrostatic discharge (ESD) protection device is provided that can be formed in various complementary metal-oxide-semiconductor (CMOS) systems....
US-1,025,6224 Multiple-unit semiconductor device
A multiple-unit semiconductor device (1) includes a normally-ON type first FET (11) and a normally-OFF type second FET (12) that are connected to each other in...
US-1,025,6223 Cells having transistors and interconnects including nanowires or 2D material strips
An integrated circuit design tool includes a cell library. The cell library includes entries for a plurality of cells, entries in the cell library including...
US-1,025,6222 Light emitting diode substrate and display apparatus applying the same
A light emitting diode substrate includes a substrate, a plurality of first light emitting diode and second light emitting diode. The first light emitting diode...
US-1,025,6221 Method for integrating a light emitting device
Light emitting devices and methods of integrating micro LED devices into light emitting device are described. In an embodiment a light emitting device includes...
US-1,025,6220 Optical sensor
An optical sensor that captures a heart rate and/or a blood oxygen content includes a light source including a light emitter that emits electromagnetic...
US-1,025,6219 Forming embedded circuit elements in semiconductor package assembles and structures formed thereby
Methods of forming stacked die assemblies are described. Those methods/structures may include forming a circuit element on a first substrate, wherein a first...
US-1,025,6218 Light emitting device package
A light emitting device package includes: a plurality of light emitting chips configured to emit respective wavelength lights, each chip comprising electrodes...
US-1,025,6216 Interconnect structures with intermetallic palladium joints and associated systems and methods
Interconnect structures with intermetallic palladium joints are disclosed herein. In one embodiment, a method of forming an interconnect structure includes...
US-1,025,6215 Semiconductor package
A semiconductor package includes a first semiconductor chip including a through silicon via in the first semiconductor chip and a first trench portion in an...
US-1,025,6214 Computer modules with small thicknesses and associated methods of manufacturing
Computer modules with small thicknesses and associated methods of manufacturing are disclosed. In one embodiment, the computer modules can include a module...
US-1,025,6213 Reduced-height electronic memory system and method
A computer memory module can include a molded layer disposed on a DRAM substrate. The molded layer can encapsulate a DRAM die and wire bonds that connect the...
US-1,025,6212 Semiconductor chip having multiple pads and semiconductor module including the same
The present disclosure provides a semiconductor chip. The semiconductor chip includes a switching element having a gate electrode, a first pad, and a second...
US-1,025,6211 Multi-chip-module semiconductor chip package having dense package wiring
An apparatus is described having a build-up layer. The build-up layer has a pad side of multiple die pressed into a bottom side of the build-up layer. The...
US-1,025,6210 Semiconductor package structure and method for forming the same
A semiconductor package structure has a first electronic component on an insulating layer, a dielectric layer on the insulating layer and surrounding the first...
US-1,025,6209 Resin substrate, component-mounted resin substrate, method of manufacturing resin substrate, and method of...
A component-mounted resin substrate includes a thermoplastic resin substrate and an electronic component. The resin substrate includes a surface including a...
US-1,025,6208 Overlapping stacked die package with vertical columns
Some forms relate to an electronic assembly (10) that includes a die (11) that includes an upper surface (12) and a conductive column (13) extending from the...
US-1,025,6207 Clip-bonded semiconductor chip package using metal bumps and method for manufacturing the package
A clip-bonded semiconductor chip package comprises a lead frame having a pad and a lead; a semiconductor chip bonded onto the pad of the lead frame; a bonding...
US-1,025,6206 Qubit die attachment using preforms
Embodiments of the present disclosure describe novel qubit device packages, as well as related computing devices and methods. In one embodiment, an exemplary...
US-1,025,6205 Variable ball height on ball grid array packages by solder paste transfer
BGA packages with a spatially varied ball height, molds and techniques to form such packages. A template or mold with cavities may be pre-fabricated to hold...
US-1,025,6204 Separation of integrated circuit structure from adjacent chip
Embodiments of the present disclosure relate to separating an integrated circuit (IC) structure from an adjacent chip. An IC structure according to embodiments...
US-1,025,6203 Semiconductor device and semiconductor package
A semiconductor package includes a die, a passivation layer, a plurality of first electrical conductive vias, a plurality of second electrical conductive vias,...
US-1,025,6202 Durable bond pad structure for electrical connection to extreme environment microelectronic integrated circuits
A durable bond pad structure is described that facilitates highly durable electrical connections to semiconductor microelectronics chips (e.g., silicon carbide...
US-1,025,6201 Bonding pad structure having island portions and method for manufacturing the same
A method for fabricating a bonding pad structure includes forming a dielectric layer on a substrate; forming a first metal pattern layer in the dielectric...
US-1,025,6200 Electronic component package and method of manufacturing the same
An electronic component package and a method of manufacturing the same are provided. The electronic component package includes a frame having a through-hole, an...
US-1,025,6199 Integrated receiver circuit for electromagnetic pulse detection in wireless microcontrollers
An integrated circuit includes an energy detection circuit, a switching circuit, and a tamper response circuit. The integrated circuit has an input for...
US-1,025,6198 Warpage control for microelectronics packages
Techniques for reducing warpage for microelectronic packages are provided. A warpage control layer or stiffener can be attached to a bottom surface of a...
US-1,025,6197 Radio-frequency isolation using front side opening
A transistor device includes a transistor implemented over a semiconductor substrate, one or more dielectric layers formed over the transistor, and a handle...
US-1,025,6196 Semiconductor device and method for manufacturing same
A semiconductor device in which an insulating material layer contains no reinforced fibers such as a glass cloth or a nonwoven cloth and which enables...
US-1,025,6195 Module and method for manufacturing same
A module includes a wiring board, a plurality of components mounted on an upper surface of the wiring board, a sealing resin layer which seals the components...
US-1,025,6194 Electronic circuit package using composite magnetic sealing material
Disclosed herein is an electronic circuit package includes a substrate, an electronic component mounted on a surface of the substrate, and a magnetic mold resin...
US-1,025,6193 Methods and devices with enhanced grounding and shielding for wire bond structures
A semiconductor device includes a package substrate, a semiconductor die attached to a first major surface of the package substrate, and a plurality of wire...
US-1,025,6192 Fan-out semiconductor package
A fan-out semiconductor package includes a first connection member having a through-hole, a semiconductor chip disposed in the through-hole, at least one...
US-1,025,6191 Hybrid dielectric scheme for varying liner thickness and manganese concentration
A semiconductor device is provided and includes first and second dielectrics, first and second conductive elements, a self-formed-barrier (SFB) and a liner. The...
US-1,025,6190 Variable resistance memory devices
A variable resistance memory device includes different variable resistance patterns on different memory regions of a substrate. The different variable...
US-1,025,6189 Switched power stage with integrated passive components
A scalable switching regulator architecture has an integrated inductor. In some embodiments an area and current drive capability of switches of the switching...
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