Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-1,025,6188 Interconnect via with grown graphitic material
An integrated circuit has a substrate and an interconnect region disposed on the substrate. The interconnect region includes a plurality of interconnect levels....
US-1,025,6187 Semiconductor device with slotted backside metal for improving Q factor
A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate; a winding structure formed on a top side the semiconductor...
US-1,025,6186 Interconnect structure having subtractive etch feature and damascene feature
Methods of forming an interconnect structure include depositing a first conductive material on a substrate. Aspects include subtractively etching the conductive...
US-1,025,6185 Nitridization for semiconductor structures
A method for fabricating a semiconductor structure includes the following steps. A substrate including a dielectric material is formed. A surface of the...
US-1,025,6184 Semiconductor device and manufacturing method thereof
A semiconductor device has a semiconductor substrate, a first insulating film formed on a surface of the semiconductor substrate, a first recess formed in the...
US-1,025,6183 MIMCAP structure in a semiconductor device package
The disclosed technology relates generally to a semiconductor device package comprising a metal-insulator-metal capacitor (MIMCAP). In one aspect, the MIMCAP...
US-1,025,6181 Package substrates
A package substrate includes a substrate including a circuit region, a dummy region surrounding the circuit region, and a lower circuit pattern at the dummy...
US-1,025,6180 Package structure and manufacturing method of package structure
A package structure includes a substrate, an insulator, a plurality of pads and a patterned circuit layer. The substrate includes a plurality of through holes....
US-1,025,6179 Package structure and manufacturing method thereof
A package structure includes an interconnection layer; a passivation layer disposed on the interconnection layer, in which the interconnection layer and the...
US-1,025,6178 Vertical and horizontal circuit assemblies
In a general aspect, an apparatus can include a leadframe including a plurality of leads configured to be coupled with a printed circuit board. The plurality of...
US-1,025,6177 Integrated interposer solutions for 2D and 3D IC packaging
An integrated circuit (IC) package includes a first substrate having a backside surface and a top surface with a cavity disposed therein. The cavity has a floor...
US-1,025,6176 Through-hole electrode substrate and semiconductor device using through-hole electrode substrate
A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a...
US-1,025,6175 Printed wiring board and method for manufacturing printed wiring board
A printed wiring board includes a support plate, a laminate formed on the support plate and including first conductor pads on a first surface side of the...
US-1,025,6174 Film type semiconductor package
A film type semiconductor package includes a film substrate; a metal pattern extending a first length in a first direction on the film substrate, having a first...
US-1,025,6173 Semiconductor device and method for manufacturing the same
The present disclosure relates to a semiconductor device and a method for manufacturing the same. The semiconductor device includes a substrate, a first package...
US-1,025,6172 Recessed lead leadframe packages
Leadframes for semiconductor packages. Implementations may include a plurality of leads extending inwardly into an opening surrounded by the plurality of leads...
US-1,025,6171 Air gap and air spacer pinch off
Embodiments are directed to a method of forming a semiconductor device and resulting structures having an air spacer between a gate and a contact by forming a...
US-1,025,6170 Electronic device for vehicle
An electronic device for a vehicle includes a substrate and a semiconductor package. The substrate is arranged to extend along a flowing path of wind produced...
US-1,025,6169 Semiconductor device
A highly-reliable semiconductor device has improved adhesion between a sealing material and a sealed metal member and/or a case member. In some implementations,...
US-1,025,6168 Semiconductor device and lead frame therefor
A semiconductor device includes a semiconductor die having a first side having a first terminal and an opposite second side having at least two second...
US-1,025,6167 Hydrogen diffusion barrier structures for CMOS devices and method of making the same
A semiconductor structure includes a field effect transistor located on a semiconductor substrate, a silicon oxide liner contacting at least a portion of the...
US-1,025,6166 Semiconductor device
A semiconductor device includes a resin case which houses a semiconductor element, a plurality of lead frames disposed in the principal plane of a base of the...
US-1,025,6165 Bendable display apparatus
Provided is a display apparatus capable of minimizing defect occurrences during manufacturing of the display apparatus while securing a long lifespan of the...
US-1,025,6164 Semiconductor film and field effect transistor having semiconductor and polymer portions stacked adjacent each...
The present invention provides a semiconductor film, a field effect transistor, and a method of fabricating the semiconductor film that has one or two or more...
US-1,025,6163 Method of treating a microelectronic substrate using dilute TMAH
Embodiments of the invention provide a method for treating a microelectronic substrate with dilute TMAH. In the method, a microelectronic substrate is received...
US-1,025,6162 Substrate processing system, control device, and substrate processing method
Disclosed is a substrate processing system capable of performing an etching processing collectively on a plurality of substrates accommodated in a processing...
US-1,025,6161 Dual work function CMOS devices
A method for forming a semiconductor device includes forming a first channel region and a second channel region on a substrate, depositing a dielectric material...
US-1,025,6160 Method for protecting epitaxial layer by forming a buffer layer on NMOS region
A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first gate...
US-1,025,6159 Formation of common interfacial layer on Si/SiGe dual channel complementary metal oxide semiconductor device
A method is presented for forming a semiconductor structure. The method includes forming a silicon (Si) channel for a first device, forming a first interfacial...
US-1,025,6158 Insulated epitaxial structures in nanosheet complementary field effect transistors
Integrated circuit structures include isolation elements extending into a substrate, and source/drain regions of a first transistor contacting the isolation...
US-1,025,6157 Method for manufacturing a Si-based high-mobility CMOS device with stacked channel layers, and resulting devices
A device and method for manufacturing a Si-based high-mobility CMOS device is provided. The method includes the steps of: (i) providing a silicon substrate...
US-1,025,6156 Vertical field effect transistors
Vertical field effect transistors (FETs) with minimum pitch and methods of manufacture are disclosed. The structure includes at least one vertical fin structure...
US-1,025,6155 Method for fabricating single diffusion break structure directly under a gate line
A method for fabricating semiconductor device includes the steps of: forming a first active region and a second active region extending along a first direction...
US-1,025,6154 Uniform shallow trench isolation
A method for forming a field-effect transistor (FET) including forming a plurality of individual fins on a substrate. The method continues with forming a dummy...
US-1,025,6153 Semiconductor apparatus and manufacturing method
A semiconductor apparatus and its manufacturing method are presented. The method entails providing a substrate structure comprising a substrate, one or more...
US-1,025,6152 Methods of making FinFET device comprising a piezoelectric liner for generating a surface charge
One illustrative method disclosed herein includes, among other things, forming a conformal piezoelectric material liner layer on at least the opposing lateral...
US-1,025,6151 Method of making a finFET device
A method for fabricating a fin field-effect transistor (FinFET) device includes forming a first dielectric layer over a substrate and then etching the first...
US-1,025,6150 Fabricating Fin-based split-gate high-drain-voltage transistor by work function tuning
A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first...
US-1,025,6149 Semiconductor wafer dicing crack prevention using chip peripheral trenches
A semiconductor base substrate having a substantially planar growth surface is provided. A first type III-V semiconductor layer is epitaxially grown on the...
US-1,025,6148 Method of processing wafer
The invention relates to a method of processing a wafer, having on one side a device area with a plurality of devices partitioned by a plurality of division...
US-1,025,6147 Dicing method
The dicing method comprises the steps of providing a substrate (1) of semiconductor material, the substrate having a main surface (10), where integrated...
US-1,025,6146 Method of forming semiconductor device
A semiconductor device and method of forming the same, the semiconductor device includes a first and second fin shaped structures, a first and second gate...
US-1,025,6145 Semiconductor device and method of forming the semiconductor device
A method of forming a semiconductor device includes forming a sacrificial layer in a first contact hole of a first dielectric layer, forming a second dielectric...
US-1,025,6144 Process integration approach of selective tungsten via fill
Embodiments of the present disclosure generally relate an interconnect formed on a substrate and a method of forming the interconnect thereon. In an embodiment,...
US-1,025,6143 Replacement contacts
The present disclosure describes a method of forming a replacement contact. For example, the replacement contact can include a metal with one or more first...
US-1,025,6142 Tungsten feature fill with nucleation inhibition
Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some...
US-1,025,6141 Maskless air gap to prevent via punch through
A first etch stop layer is deposited on a plurality of conductive features on an insulating layer on a substrate. A second etch stop layer is deposited over an...
US-1,025,6140 Method of reducing overlay error in via to grid patterning
Techniques herein include a method of patterning a substrate that uses a self-alignment based process to align a via to odd and even trenches by using multiple...
US-1,025,6139 Chemoepitaxy etch trim using a self aligned hard mask for metal line to via
A method of forming metal lines that are aligned to underlying metal features that includes forming a neutral layer atop a hardmask layer that is overlying a...
US-1,025,6138 Methods of fabricating silicon-on-insulator (SOI) semiconductor devices using blanket fusion bonding
A method for fabricating silicon-on-insulator (SOI) semiconductor devices, wherein the piezoresistive pattern is defined within a blanket doped layer after...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.