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Patent # Description
US-1,029,7582 BVA interposer
A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation...
US-1,029,7581 Quantum dot integration schemes
Display panels and methods of manufacture are described for down converting a peak emission wavelength of a pump LED within a subpixel with a quantum dot layer....
US-1,029,7580 3D semiconductor device and structure
A 3D semiconductor device, the device including: a first single crystal layer including a plurality of first transistors; at least one first metal layer...
US-1,029,7579 Package on-package structure with epoxy flux residue
A structure includes a first package and a second package. The second package is coupled to the first package by one or more connectors. Epoxy flux residue is...
US-1,029,7578 Memory device
A memory device includes a first memory cell array, a second memory cell array disposed in a first direction with respect to the first memory cell array, a...
US-1,029,7577 Semiconductor device assembly with heat transfer structure formed from semiconductor material
Semiconductor device assemblies with heat transfer structures formed from semiconductor materials are disclosed herein. In one embodiment, a semiconductor...
US-1,029,7576 Reduced form factor radio frequency system-in-package
A packaged module for a radio frequency wireless device has a substrate supporting a first wireless device component and a second wireless device component...
US-1,029,7575 Semiconductor device utilizing an adhesive to attach an upper package to a lower die
An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of...
US-1,029,7574 System in package (SIP) with dual laminate interposers
There is provided a semiconductor device assembly with an interposer and method of manufacturing the same. More specifically, in one embodiment, there is...
US-1,029,7573 Three-dimensional package structure and the method to fabricate thereof
A three-dimensional package structure, comprising: a substrate; a first plurality of discrete electronic components disposed over the bottom surface of the...
US-1,029,7572 Discrete flexible interconnects for modules of integrated circuits
Flexible interconnects, flexible integrated circuit systems and devices, and methods of making and using flexible integrated circuitry are presented herein. A...
US-1,029,7571 Semiconductor package
According to one embodiment, a semiconductor package includes a substrate with first and second pad, first semiconductor chip above the substrate, first wire,...
US-1,029,7570 3D-joining of microelectronic components with conductively self-adjusting anisotropic matrix
An adhesive with self-connecting interconnects is provided. The adhesive layer provides automatic 3D joining of microelectronic components with a conductively...
US-1,029,7569 Method of forming a three-dimensional bonded semiconductor structure having nitridized oxide regions
A first semiconductor structure including a first bonding oxide layer having a first metallic bonding structure embedded therein and a second semiconductor...
US-1,029,7568 Systems and methods for bonding semiconductor elements
A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first...
US-1,029,7567 Thermocompression bonding using plasma gas
Described herein are devices and techniques for thermocompression bonding. A device can include a housing, a platform, and a plasma jet. The housing can define...
US-1,029,7566 Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a substrate, a chip, a plurality of conductive bumps, a flexible printed circuit (FPC) board and a plurality of circuit...
US-1,029,7565 Electronic device by laser-induced forming and transfer of shaped metallic interconnects
An electronic device made from the method of providing a donor substrate comprising an array of metallic interconnects, using a laser system to prepare the...
US-1,029,7564 Semiconductor die attach system and method
A semiconductor package includes a semiconductor die, a substrate for supporting the semiconductor die, an encapsulant covering the semiconductor die and at...
US-1,029,7563 Copper seed layer and nickel-tin microbump structures
Techniques and mechanisms for providing effective connectivity with surface level microbumps on an integrated circuit package substrate. In an embodiment,...
US-1,029,7562 Semiconductor device and method of manufacturing a semiconductor device
Provided is a semiconductor device that is resistant to the corrosion of titanium nitride forming an anti-reflection film. The semiconductor device includes: a...
US-1,029,7561 Interconnect structures for preventing solder bridging, and associated systems and methods
Semiconductor dies having interconnect structures formed thereon, and associated systems and methods, are disclosed herein. In one embodiment, an interconnect...
US-1,029,7559 Semiconductor device and semiconductor package including the same
Provided are a semiconductor device and a semiconductor package including the same. The semiconductor device comprises a semiconductor chip body including a...
US-1,029,7558 Trimming method, trimming circuity, and trimming system for integrated circuit with memory usage reduction
The disclosure provides a trimming method, a trimming circuitry, and a trimming system for an IC with memory usage reduction. The method is applicable to a...
US-1,029,7557 Semiconductor device and method for manufacturing the semiconductor device
A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide substrate and a protective...
US-1,029,7556 Semiconductor device and method of controlling warpage in reconstituted wafer
A semiconductor device has a substrate with a stiffening layer disposed over the substrate. The substrate has a circular shape or rectangular shape. A plurality...
US-1,029,7555 Integrated circuit structure having crown-shaped semiconductor strips and recesses in the substrate from etched...
An integrated circuit structure includes a semiconductor substrate having a plurality of semiconductor strips, a first recess being formed by two adjacent...
US-1,029,7554 Semiconductor package and method of fabricating the same
A semiconductor package including a marking film and a method of fabricating the same are provided wherein a marking film including a thermoreactive layer may...
US-1,029,7553 Electronic component package and method of manufacturing the same
An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and...
US-1,029,7552 Semiconductor device with embedded semiconductor die and substrate-to-substrate interconnects
A semiconductor device having an embedded semiconductor die and substrate-to-substrate interconnects is disclosed and may include a substrate with a top surface...
US-1,029,7551 Method of manufacturing redistribution circuit structure and method of manufacturing integrated fan-out package
A method of manufacturing a redistribution circuit structure and a method of manufacturing an INFO package at least include the following steps. An ...
US-1,029,7550 3D IC architecture with interposer and interconnect structure for bonding dies
A device includes an interposer, which includes a substrate having a top surface. An interconnect structure is formed over the top surface of the substrate,...
US-1,029,7549 Method of forming stacked trench contacts and structures formed thereby
Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a structure comprising a first contact...
US-1,029,7548 Interconnection structure, fabricating method thereof, and semiconductor device using the same
A semiconductor device includes a semiconductor substrate, an epitaxy structure present in the semiconductor substrate, and a silicide present on a textured...
US-1,029,7547 Semiconductor device including first and second wirings
A wiring is formed over a semiconductor substrate via an interlayer insulation film, and another interlayer insulation film is formed over the interlayer...
US-1,029,7546 Interconnect structures for a security application
Interconnect structures for a security application and methods of forming an interconnect structure for a security application. A sacrificial masking layer is...
US-1,029,7545 Memory device having capped embedded wires
The invention provides a memory device. The memory device includes a substrate, a plurality of first wires, a plurality of etch-stop layers, a dielectric layer,...
US-1,029,7544 Integrated fan-out package and method of fabricating the same
Provided is an integrated fan-out package including a die, an insulating encapsulation, a redistribution circuit structure, a conductive terminal, and a barrier...
US-1,029,7543 Vertical semiconductor device
A vertical semiconductor device including a plurality of interlayer insulating layer patterns spaced apart from each other on a substrate and stacked in a...
US-1,029,7542 Land side and die side cavities to reduce package z-height
A package structure including a capacitor mounted within a cavity in the package substrate is disclosed. The package structure may additionally include a die...
US-1,029,7541 Multiple-component substrate for a microelectronic device
Microelectronic devices having a multiple-component substrate assembly. A primary supports one or more integrated circuits, and an auxiliary substrate is...
US-1,029,7540 Wiring substrate
A wiring substrate includes a first wiring layer, an insulation layer arranged on the first wiring layer and formed of a photosensitive resin, a via hole formed...
US-1,029,7539 Electronic device including soldered surface-mount component
The melting of die-bonding solder material is prevented even when soldering a surface-mount component formed using the die-bonding solder material on a printed...
US-1,029,7538 Signal transmission apparatus including semiconductor chips and signal isolator
A signal transmission apparatus includes: a first lead frame; a second lead frame spaced from the first lead frame; a primary semiconductor chip electrically...
US-1,029,7537 Lead frame and method of producing a chip housing
A lead frame used to produce a chip package includes a first lead frame section and a second lead frame section connected to one another by a bar, wherein the...
US-1,029,7536 Direct selective adhesion promotor plating
A lead frame strip having a plurality of unit lead frames is provided. Each of the unit lead frames have a die paddle and a plurality of leads extending away...
US-1,029,7535 Die package component with jumper structure and manufacturing method thereof
A die package component with a jumper structure includes a first lead frame, a second lead frame, a die, a jumper structure and a package body. The first lead...
US-1,029,7534 Integrated circuit (IC) package with a solder receiving area and associated methods
A single chip integrated circuit (IC) package includes a die pad, and a spacer ring on the die pad defining a solder receiving area. A solder body is on the die...
US-1,029,7533 Semiconductor device
A semiconductor device is provided, including: a bottom portion having a pad formed of a conductive material; a lid portion covering at least a part of the...
US-1,029,7532 Stacked interconnect structure and method of making the same
A stacked interconnect structure includes a first conductive layer, a second conductive layer, and a first dielectric layer disposed between the first and...
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