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Patent # Description
US-1,029,7531 Method for producing semiconductor device and semiconductor device
A method of producing a semiconductor device includes forming, on a semiconductor substrate comprising a first surface on which an insulating layer covering a...
US-1,029,7530 Press member for semiconductor stack unit
A press member which has a given length for pressing a semiconductor stack unit. The press member includes supported portions with which supporting members are...
US-1,029,7529 Thermally enhanced semiconductor package and process for making the same
The present disclosure relates to a thermally enhanced semiconductor package, which includes a module substrate, a thinned flip chip die over the module...
US-1,029,7528 Semiconductor module
A semiconductor module includes case that houses a semiconductor device therein and a fastener that is connected at one end thereof to the case. The fastener...
US-1,029,7527 Semiconductor device
A semiconductor device includes a radiation plate having a rear surface roughened by a plurality of dents that overlap with each other; a laminated substrate...
US-1,029,7526 Compound semiconductor device structures comprising polycrystalline CVD diamond
A semiconductor device structure includes a layer of single crystal compound semiconductor material; and a layer of polycrystalline CVD diamond material. The...
US-1,029,7525 Base plate for heat sink as well as heat sink and IGBT module having the same
A base plate for a heat sink as well as a heat sink and an IGBT module having the same are provided. The base plate includes: a base plate body, including a...
US-1,029,7524 Heat sink
To provide a heat sink capable of enhancing heat dissipation performance. Cylindrical bodies 3 have openings 3a of which inner and outer sides are opened on...
US-1,029,7523 Power module and method for manufacturing the same
A power module and a method for manufacturing the same are provided. The power module comprises: a substrate, at least one power device, and an organic heat...
US-1,029,7522 Semiconductor package structure and manufacturing method thereof
A semiconductor package structure and manufacturing method thereof are provided. Firstly, a first surface mounting unit, a first printed circuit board, and a...
US-1,029,7521 Circuit substrate, and electronic device including same
A circuit substrate is provided with a base formed of ceramics. It includes a first face a second face; and a through hole penetrating from the first face to...
US-1,029,7520 Semiconductor device and manufacturing method of a semiconductor device
A manufacturing method of a semiconductor device includes: forming a mark on a surface of a semiconductor wafer, at least a part of the mark being disposed in a...
US-1,029,7519 Semiconductor device and method of forming PoP semiconductor device with RDL over top package
A PoP semiconductor device has a top semiconductor package disposed over a bottom semiconductor package. The top semiconductor package has a substrate and a...
US-1,029,7518 Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level...
A semiconductor device includes a semiconductor die. An encapsulant is formed around the semiconductor die. A build-up interconnect structure is formed over a...
US-1,029,7517 Manufacturing method of package carrier
A manufacturing method of a package carrier is provided. A substrate having a through hole is provided, wherein a profile of the through hole from top view is a...
US-1,029,7516 Semiconductor device
A semiconductor device includes a semiconductor element, a base, and an outer packaging resin. The base has a mounting surface, on which the semiconductor...
US-1,029,7515 Fingerprint sensor and manufacturing method thereof
A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various...
US-1,029,7514 Thermal processing method and thermal processing apparatus through light irradiation
A susceptor is preheated through light irradiation by a halogen lamp before the first semiconductor wafer of a lot as a processing target is transferred into a...
US-1,029,7513 Stacked vertical NFET and PFET
The present invention provides stacked VFET devices. In one aspect, a method of forming a stacked VFET device includes: patterning a fin(s) in a wafer having a...
US-1,029,7512 Method of making thin SRAM cell having vertical transistors
A memory device includes six field effect transistors (FETs) formed with semiconductor nanowires arranged on a substrate in an orientation substantially...
US-1,029,7511 Fin-FET device and fabrication method thereof
A method for fabricating a Fin-FET device includes forming fin structures on a substrate and an isolation structure to cover a portion of sidewall surfaces of...
US-1,029,7510 Sidewall image transfer process for multiple gate width patterning
A method for fabricating a multiple gate width structure for an integrated circuit is described. A fin on a semiconductor substrate with a first hard mask layer...
US-1,029,7509 Semiconductor device and fabrication method thereof
A semiconductor device and a method for fabricating the semiconductor device are provided. The method includes providing a base substrate including a first...
US-1,029,7508 Semiconductor device and method
Nanowire devices and fin devices are formed in a first region and a second region of a substrate. To form the devices, alternating layers of a first material...
US-1,029,7507 Self-aligned vertical field-effect transistor with epitaxially grown bottom and top source drain regions
A vertical FET structure includes a bottom source-drain region disposed on a substrate of the first type; a recessed first heterostructure layer disposed on the...
US-1,029,7506 HDP fill with reduced void formation and spacer damage
A method for filling gaps between structures includes forming a plurality of high aspect ratio structures adjacent to one another with gaps, forming a first...
US-1,029,7505 Semiconductor device and fabrication method therefor
A method of manufacturing a semiconductor device includes forming a first insulating film over a first fin structure and a second insulating film over a second...
US-1,029,7504 Methods of forming a gate structure-to-source/drain conductive contact and the resulting devices
Various novel methods of forming a gate-to-source/drain conductive contact structure and the resulting novel device structures are disclosed. One illustrative...
US-1,029,7503 Laser lift off systems and methods
Laser lift off systems and methods may be used to provide monolithic laser lift off with minimal cracking by reducing the size of one or more beam spots in one...
US-1,029,7502 Isolation structure for micro-transfer-printable devices
A semiconductor structure suitable for micro-transfer printing includes a semiconductor substrate and a patterned insulation layer disposed on or over the...
US-1,029,7501 Method for dividing wafer into individual chips
A wafer has a front face that is partitioned by a plurality of streets crossing with each other into a plurality of regions in each of which a device is formed....
US-1,029,7500 Semiconductor wafer dicing method
A method of dicing a bowed or warped semiconductor wafer includes cutting along the saw streets in a first direction on a first half of the wafer, where the...
US-1,029,7499 Method of forming a wrap-around contact on a semiconductor device
Techniques and methods related to forming a wrap-around contact on a semiconductor device, and apparatus, system, and mobile platform incorporating such...
US-1,029,7498 Method for preparing ceramic package substrate with copper-plated dam
A method for preparing a ceramic package substrate with a copper-plated dam involves making a circuit layer on a ceramic base by performing thin film...
US-1,029,7497 Sacrificial layer for platinum patterning
In accordance with at least one embodiment of the disclosure, a method of patterning platinum on a substrate is disclosed. In an embodiment, an adhesive layer...
US-1,029,7496 Method for processing target objection
In a method for processing a target object including a conductive layer and an insulating film formed on the conductive layer, the insulating film is etched by...
US-1,029,7495 Method of manufactuing semiconductor device
A method of manufacturing a semiconductor device includes forming a first conductive structure on a substrate, forming an insulation layer on a sidewall of the...
US-1,029,7494 Raised via for terminal connections on different planes
A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom...
US-1,029,7493 Trench isolation interfaces
The present disclosure includes semiconductor structures and methods of forming semiconductor structures for trench isolation interfaces. An example...
US-1,029,7492 Mechanism for FinFET well doping
The embodiments of mechanisms for doping wells of finFET devices described in this disclosure utilize depositing doped films to dope well regions. The...
US-1,029,7491 Semiconductor device having isolation structure in well of substrate
A structure of a semiconductor includes an isolation structure in a well of a substrate. An upper surface of the isolation structure in the well of the...
US-1,029,7490 Semiconductor device and method for manufacturing semiconductor device
A semiconductor device includes a semiconductor substrate of a first conductivity type, a plurality of short-circuit prevention-regions of a second conductivity...
US-1,029,7489 Plasma processing method and plasma processing apparatus
A plasma processing method includes a mounting process of mounting a holding sheet holding a substrate in a stage provided in a plasma processing apparatus, and...
US-1,029,7488 Workpiece support jig
A workpiece support jig includes a support plate supporting a workpiece on a first surface while covering a support surface of a chuck table with a second...
US-1,029,7487 Element chip manufacturing method
Provided is a method of manufacturing a semiconductor chip, the method comprising: preparing a plurality of semiconductor chips, each of which has a surface to...
US-1,029,7485 Semiconductor device, making method, and laminate
A semiconductor device is provided comprising a support, an adhesive resin layer, an insulating layer, a redistribution layer, a chip layer, and a mold resin...
US-1,029,7483 Substrate carrier with integrated electrostatic chuck
A substrate carrier adapted to use in a processing system includes an electrode assembly and a support base. The electrode assembly is configured to generate an...
US-1,029,7482 End effector and substrate conveying robot
An end effector has a plurality of blade bodies and a substrate holding unit on a blade proximal end side of each of the blade bodies. The substrate holding...
US-1,029,7481 Magnetic annealing apparatus
A magnetic annealing apparatus is provided which performs a magnetic annealing on workpieces held in a workpiece boat by using a horizontal superconducting...
US-1,029,7480 Buffer station with single exit-flow direction
A buffer for use in semiconductor processing tools is disclosed. The buffer may be used to temporarily store wafers after processing operations are performed on...
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