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Patent # Description
US-1,029,7479 Wafer debonding using mid-wavelength infrared radiation ablation
Structures and methods are provided for temporarily bonding handler wafers to device wafers using bonding structures that include one or more releasable layers...
US-1,029,7478 Method and apparatus for embedding semiconductor devices
An apparatus includes a product substrate having a transfer surface, and a semiconductor die defined, at least in part, by a first surface adjoined to a second...
US-1,029,7477 Chamber
Embodiments of the invention provide a chamber for semiconductor processing, which includes a chamber body and an isolation window, the chamber body being of a...
US-1,029,7476 Substrate processing apparatus
A supply flow passage branches into a plurality of upstream flow passages. A plurality of discharge ports are respectively disposed at a plurality of positions...
US-1,029,7475 Flattening method and flattening apparatus
A flattening method, by utilizing the advantages of the CARE method and making up for the disadvantages, can perform removal processing of a surface of a...
US-1,029,7474 Chemical supplier, processing apparatus including the chemical supplier
A chemical supplier includes a chemical reservoir containing a chemical mixture at a room temperature, an inner space of the chemical reservoir being separated...
US-1,029,7473 Liquid processing apparatus
A liquid processing apparatus performs a liquid processing on a rotating substrate by supplying a processing liquid. Surrounding members surround a region...
US-1,029,7472 Method and apparatus for cleaning semiconductor wafer
A method and apparatus (100) for cleaning semiconductor wafer are provided, combining batch cleaning and single wafer cleaning together. The method includes the...
US-1,029,7471 Fan-out structure and method of fabricating the same
A semiconductor structure and a method of forming include a first semiconductor die and a first dummy die over a carrier, wherein a thickness of the first...
US-1,029,7470 Resin sheet for sealing electronic device and method for manufacturing electronic-device package
Provided are a resin sheet, for sealing an electronic device, which is not easily shifted out of position; and a method for manufacturing an electronic-device...
US-1,029,7469 Method for producing an electronic component and electronic component
A method for producing an electronic component and an electronic component, having barrier layers for the encapsulation of the component. The method involves...
US-1,029,7468 Semiconductor device with recess and method of making
A semiconductor device is provided with a substrate made of a semiconductor material, an interconnect layer, at least one electronic element, and a sealing...
US-1,029,7467 Self-aligned via and plug patterning for back end of line (BEOL) interconnects
Self-aligned via and plug patterning for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit...
US-1,029,7466 Semiconductor device and manufacturing method thereof
Provided are a semiconductor device including an interposer having a relatively thin thickness without a through silicon via and a method of manufacturing the...
US-1,029,7465 Selective metal/metal oxide etch process
The present invention provides a process for selectively etching molybdenum or titanium relative to a oxide semiconductor film, including providing a substrate...
US-1,029,7463 Method for manufacturing silicon wafer
A method for manufacturing a silicon wafer having a denuded zone in a surface layer by performing a heat treatment to a silicon wafer, including: a step A,...
US-1,029,7462 Methods of etching films comprising transition metals
Provided are methods for etching films comprising transition metals. Certain methods involve activating a substrate surface comprising at least one transition...
US-1,029,7461 CMP polishing agent, manufacturing method thereof, and method for polishing substrate
The present invention provides a CMP polishing agent containing polishing particles, a protective agent, and water, wherein the protective agent is a...
US-1,029,7460 Stress relieving semiconductor layer
A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing...
US-1,029,7459 Technique to deposit sidewall passivation for high aspect ratio cylinder etch
Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a substrate. Separate etching and...
US-1,029,7458 Process window widening using coated parts in plasma etch processes
Embodiments of the present technology may include a method of etching. The method may include mixing plasma effluents with a gas in a first section of a chamber...
US-1,029,7457 Controlling azimuthal uniformity of etch process in plasma processing chamber
Apparatus, systems, and methods for controlling azimuthal uniformity of an etch process in a plasma processing chamber are provided. In one embodiment, a plasma...
US-1,029,7456 Dielectric structures for nitride semiconductor devices
A dielectric structure for a nitride semiconductor device and a method of forming the same. A semiconductor device includes at least one semiconductor layer....
US-1,029,7455 Gate oxide structure and method for fabricating the same
A method for forming a gate oxide layer on a substrate is provided, in which a region of the substrate is defined out by a shallow trench isolation (STI)...
US-1,029,7454 Semiconductor device and fabrication method thereof
A method is provided for fabricating a semiconductor device. The method includes providing a base substrate including a dummy gate electrode and an interlayer...
US-1,029,7453 Pre-deposition treatment and atomic layer deposition (ALD) process and structures formed thereby
Various methods and structures formed by those methods are described. In accordance with a method, a first metal-containing layer is formed on a substrate. A...
US-1,029,7452 Methods of forming a gate contact structure for a transistor
One illustrative method disclosed includes selectively forming sacrificial conductive source/drain cap structures on and in contact with first and second...
US-1,029,7451 Memory device
A method of manufacturing a memory device includes: providing a substrate; forming in a cell region a channel extending in a direction perpendicular to an upper...
US-1,029,7450 Manufacturing method of SiC substrate
Provided is a manufacturing method for manufacturing a SiC substrate having a flattened surface, including etching the surface of the SiC substrate by...
US-1,029,7449 Method for manufacturing thin film transistor, method for manufacturing array substrate, array substrate and...
A method for manufacturing thin film transistor, a method for manufacturing array substrate, an array substrate and a display device are provided. The method...
US-1,029,7448 SiGe fins formed on a substrate
A semiconductor structure formed based on selectively forming a silicon-germanium (SiGe) layer on a substrate; forming at least one fin with a first width from...
US-1,029,7447 High electron mobility transistor manufacturing method and high electron mobility transistor
Examples of a high electron mobility transistor manufacturing method includes forming a buffer layer including a nitride semiconductor doped with any one of...
US-1,029,7446 Encapsulated substrate, manufacturing method, high band-gap device having encapsulated substrate
An encapsulated substrate includes a zinc oxide substrate and a composite barrier layer. The composite barrier layer includes a first film layer having a first...
US-1,029,7445 Engineered substrate structure for power and RF applications
A substrate includes a support structure comprising: a polycrystalline ceramic core; a first adhesion layer coupled to the polycrystalline ceramic core; a...
US-1,029,7444 Enhanced thin film deposition
Methods of producing metal-containing thin films with low impurity contents on a substrate by atomic layer deposition (ALD) are provided. The methods preferably...
US-1,029,7443 Semiconductor device manufacturing method and semiconductor device manufacturing system
A semiconductor device manufacturing method includes: a primary process of supplying a process gas to a substrate having a depression formed therein to form a...
US-1,029,7442 Remote plasma based deposition of graded or multi-layered silicon carbide film
Provided are methods and apparatuses for depositing a graded or multi-layered silicon carbide film using remote plasma. A graded or multi-layered silicon...
US-1,029,7441 Low-temperature atomic layer deposition of boron nitride and BN structures
Methods of the disclosure include a BN ALD process at low temperatures using a reactive nitrogen precursor, such as thermal N.sub.2H.sub.4, and a boron...
US-1,029,7440 Method of manufacturing semiconductor device
Provided is a technique for forming a film having a desired stress on a substrate. A method of manufacturing a semiconductor device includes: forming a film...
US-1,029,7439 Film forming method and film forming system
A film forming method of depositing a thin film of a reaction product generated by a reaction between a raw material gas and a reactive gas on a substrate by...
US-1,029,7438 Water producing method
Disclosed herein is a wafer producing method for producing a hexagonal single crystal wafer from a hexagonal single crystal ingot. The wafer producing method...
US-1,029,7437 Sulfur plasma lamp
A sulfur plasma lamp has a lamp envelope of transparent or translucent glass or ceramic material. At least two silicon carbide electrodes are hermetically...
US-1,029,7436 Device and method for ion cyclotron resonance mass spectrometry
The present invention relates to a method and device for measuring m/z ratios of ions in ion cyclotron resonance (ICR) mass spectrometry. The described ion...
US-1,029,7435 Micro-nozzle array
The invention relates to a micro-nozzle array comprising a plurality of capillaries comprising a first silica-based material and a second silica-based material...
US-1,029,7434 Method for extracting mass information from low resolution mass-to-charge ratio spectra of multiply charged species
An apparatus and method for extracting mass information from low resolution mass-to-charge ratio spectra of multiply charged species is described. Curve fitting...
US-1,029,7433 Suppressing harmonic signals in ion cyclotron resonance mass spectrometry
The invention relates to reducing harmonic signals in FT-ICR spectra. Since harmonic signals in quadrupolar 2.omega.-detection can be more abundant for the same...
US-1,029,7432 Systems and methods for sequential windowed acquisition across a mass range using an ion trap
Systems and methods are provided to perform sequential windowed acquisition of mass spectrometry data. A mass range and a mass window width parameter are...
US-1,029,7431 Treating arcs in a plasma process
An arc treatment device includes an arc detector operable to detect whether an arc is present in a plasma chamber, an arc energy determiner operable to...
US-1,029,7430 Gold or platinum target, and production method for same
Method of producing a target having a small average crystal grain size of gold or platinum and having a uniform crystal grain size in an in-plane direction of a...
US-1,029,7429 High-purity copper-chromium alloy sputtering target
Provided is a high-purity copper-chromium alloy sputtering target comprising 0.1 to 10 wt % of Cr and the remainder being Cu and inevitable impurities, wherein...
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