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Patent # Description
US-1,029,7324 Physical secure erase of solid state drives
Embodiments of the present disclosure relate to physical secure erase (PSE) of solid state drives (SSDs). One embodiment of a method of PSE of a SSD includes...
US-1,029,7323 Reducing disturbs with delayed ramp up of dummy word line after pre-charge during programming
A memory device and associated techniques for reducing disturbs of select gate transistors and dummy memory cells in a memory device. In one approach, a ramp up...
US-1,029,7322 Memory device with a driving circuit comprising transistors each having two gate electrodes and an oxide...
A memory device in which data can be retained for a long time is provided. The memory device includes a memory element and a transistor which functions as a...
US-1,029,7321 Memory cell structure
A memory cell structure includes a plurality of write lines arranged for writing a synapse state to a synapse memory cell including a plurality of cell...
US-1,029,7320 Resistance change memory cell circuits and methods
The gate of the access transistor of a 1 transistor 1 resistor (1T1R) type RRAM cell is biased relative to the source of the access transistor using a current...
US-1,029,7319 Memory device with unipolar resistive memory cells with programmable resistive element end control transistor...
A memory circuit including cells connected in rows and in columns, each cell including a programmable resistive element and a control transistor, the memory...
US-1,029,7318 Compensated readout of a memristor array, a memristor array readout circuit, and method of fabrication thereof
A method for readout of a gated memristor array, a memristor array readout circuit and method of fabrication thereof are provided. In the context of the method,...
US-1,029,7317 Non-volatile semiconductor memory device including clamp circuit with control transistor and amplifier circuit
A non-volatile semiconductor memory device includes a current source providing a reference current to a first node and a clamp circuit. The clamp circuit...
US-1,029,7316 Phase change memory apparatus and read control method to reduce read disturb and sneak current phenomena
A memory device and associated control methods are provided. The memory device is electrically connected to M bit lines and N word lines. The memory device...
US-1,029,7315 Resistive memory accelerator
Presented is a method and apparatus for solving. The method includes receiving, by a resistive memory array, a first data, the resistive memory array comprising...
US-1,029,7314 Systems and methods for non-volatile flip flops
An integrated circuit includes a first plurality of flip flops; a first bank of resistive memory cells, wherein each flip flop of the first plurality of flip...
US-1,029,7313 Phase change memory device capable of changing position of selected cell address
A phase change memory device may be provided. The phase change memory device may include a plurality of Mats, a row control block and a column control block....
US-1,029,7312 Resistive memory cell programmed by metal alloy formation and method of operating thereof
A resistive memory cell includes a barrier layer containing at least one of silicon and germanium, and a metal oxide layer including an oxide of a metal element...
US-1,029,7311 Systems and methods for memory protocol training
Various embodiments provide for determining a delay of a data signal with respect to a data strobe signal within a memory system comprising a memory controller...
US-1,029,7310 System and method for multi-cycle write leveling
A method and system for multi cycle write leveling are disclosed. At least three data patterns are written into consecutive address locations of a memory device...
US-1,029,7309 Methods for independent memory bank maintenance and memory devices and systems employing the same
Memory devices, systems including memory devices, and methods of operating memory devices in which multiple counters are provided to permit memory refresh...
US-1,029,7308 Semiconductor devices
A semiconductor device may be provided. The semiconductor device may include an address input circuit and a target address generation circuit. The address input...
US-1,029,7307 Methods for independent memory bank maintenance and memory devices and systems employing the same
Memory devices, systems including memory devices, and methods of operating memory devices in which multiple counters are provided to permit memory refresh...
US-1,029,7306 Volatile memory device and electronic device comprising refresh information generator, information providing...
A volatile memory device includes a refresh controller configured to control a hidden refresh operation performed on a first portion of memory cells while a...
US-1,029,7305 Memory device having twin cell mode and refresh method thereof
A memory device includes: a memory region including a plurality of word lines; and a refresh control block configured to: sequentially refresh the plurality of...
US-1,029,7304 Memory device and operating method thereof
An operating method of a memory device includes the following operations: during a refresh operation with the first refresh rate, generating a first ECC...
US-1,029,7303 Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory
A virtual ground sensing circuit includes a sense circuit configured to compare a reference voltage potential to a sense node voltage potential, and virtual...
US-1,029,7302 Magnetic storage cell memory with back hop-prevention
An apparatus is described that includes a semiconductor chip memory array having resistive storage cells. The apparatus also includes a comparator to compare a...
US-1,029,7301 Method and system for providing magnetic junctions utilizing high crystallization temperature-containing...
A magnetic device and method for providing the magnetic device junction are described. The magnetic device includes magnetic junctions and spin-orbit...
US-1,029,7300 Method and system for determining temperature using a magnetic junction
A method for measuring a temperature of magnetic junction switchable using spin transfer. The magnetic junction includes at least one magnetic layer. The method...
US-1,029,7299 Semiconductor device and operating method thereof
A semiconductor memory device may include a memory cell array. The semiconductor memory device may include a peripheral circuit coupled to the memory cell array...
US-1,029,7298 Apparatuses and methods for providing internal clock signals of different clock frequencies in a memory device
Apparatuses and methods for providing internal clock signals of different clock frequencies in a semiconductor device are described in the present application....
US-1,029,7297 Sampling module including delay locked loop, sampling unit, memory control unit, and data sampling method thereof
A sampling circuit module, a memory control circuit unit, and a data sampling method, where the sampling circuit module includes a delay lock loop (DLL) and a...
US-1,029,7296 Storage device, method for operating storage device, semiconductor device, electronic component, and electronic...
A storage device capable of performing power gating is provided. A memory cell of the storage device includes a bistable circuit, a first transistor, a second...
US-1,029,7295 Semiconductor memory device
A semiconductor memory device which is capable of high-speed operation in synchronization with external control signals is provided. The semiconductor memory...
US-1,029,7294 Apparatuses and methods for performing intra-module databus inversion operations
Apparatuses, memory modules, and methods for performing intra-module data bus inversion operations are described. An example apparatus include a memory module...
US-1,029,7293 Semiconductor apparatus and method of operating the same
A semiconductor apparatus includes a decoder configured to decode an internal command, and generate a first decoding command and a second decoding command. The...
US-1,029,7292 Sense structure based on multiple sense amplifiers with local regulation of a biasing voltage
A sense structure may include sense amplifiers each having measuring and reference terminals for receiving a measuring and a reference current, respectively,...
US-1,029,7291 Semiconductor device
The present invention provides a semiconductor device that can reduce the power consumption. The semiconductor device includes a plurality of sub-blocks each...
US-1,029,7290 Semiconductor devices, and related control logic assemblies, control logic devices, electronic systems, and methods
A semiconductor device comprises a stack structure comprising decks each comprising a memory element level comprising memory elements, and a control logic level...
US-1,029,7289 Secure speed loader for drive carriers
A loader assembly includes a base, a moveable lock, a lower lock, and an upper lock. The base has a top side, a bottom side, a leading edge, and a trailing...
US-1,029,7288 Support for computer data back-up unit(s)
A support for computer data back-up units is designed to receive at least two distinct sizes of back-up units. The support has a bottom and at least one...
US-1,029,7287 Dynamic media recording
A stream of media content is received in a media device. A value is determined in metadata of the media content relating to an indicia of interest in a portion...
US-1,029,7286 System and methods to associate multimedia tags with user comments and generate user modifiable snippets around...
Example methods and apparatus to add a tagged snippet of multimedia content to a playlist are disclosed. An example apparatus comprises an automatic content...
US-1,029,7285 Video data processing method and electronic apparatus
A video data processing method and an electronic apparatus are provided. The method includes obtaining a first image in a first video and separating a first...
US-1,029,7284 Audio/visual synching system and method
Access to a networked communication session is provided to each of a plurality of user computing devices that are each configured with at least a camera, audio...
US-1,029,7283 Selective sound storage device
A computer-readable medium, controller and a method of automatically recording a sound signal is provided. A sound signal is received by the controller from a...
US-1,029,7282 Contact detection and laser power monitoring sensor for heat-assisted magnetic recording head
A slider configured for heat-assisted magnetic recording comprises a magnetic writer, a near-field transducer, and an optical waveguide coupling the near-field...
US-1,029,7281 Servo sector detection
Systems and methods are disclosed for detection of a servo sector on a data storage medium. A circuit may be configured to sample a signal, and determine...
US-1,029,7280 Compensation for nonlinearity in servo patterns
A method according to one embodiment includes generating a y-position estimate based on a servo readback signal from a servo reader reading a servo band,...
US-1,029,7279 Methods of planarization for device fabrication with head features background
Methods of planarizing materials, such as where surface topographies are created as part of a thin film device fabrication process are described. These methods...
US-1,029,7278 Material for use in a TMR read gap without adversely affecting the TMR effect
Structures and methods for fabrication servo and data heads of tape modules are provided. The servo head may have two shield layers spaced apart by a plurality...
US-1,029,7277 Magnetic head including a coil and a magnetic path forming section
A magnetic head includes a coil, and a magnetic path forming section for defining a first space for a portion of the coil to pass through. The magnetic path...
US-1,029,7276 Systems and devices for acheiving high throughput attachment and sub-micron alignment of components
Systems and devices for achieving high throughput attachment of sub-micron alignment of components are provided. One such device can include a fixture for...
US-1,029,7275 Magnetic recording module having differing tunnel valve sensors
An apparatus according to one embodiment includes a module having an array of first read transducers each having a tunnel valve structure and a second read...
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